8.2 Multiplexing and Demultiplexing Techniques

8.2 Multiplexing and Demultiplexing Techniques

Module 5.9, Multiplexing, is a Category B2/B2L knowledge-level-2 topic. Multiplexer/demultiplexer operation, application, and identification in logic diagrams come from the pre-12 June 2024 detailed Appendix I description. Categories A, B3 and B1 are not examined on 5.9, but every electronic instrument system that shares a wire, an ADC channel or a cockpit display refresh path is using the same idea. This section treats the combinational MSI blocks first, then the enable pin, then how the same function is drawn on a schematic, and finally how time-division and frequency-division multiplexing appear in aircraft analogue and digital hardware.

Data select: 2^n inputs and n select lines

A digital multiplexer (mux, data selector) is a combinational switch. It has 2^n data inputs, n select or address lines, usually one enable (strobe), and one output. The select code chooses which single data input is connected through to the output. An 8-to-1 multiplexer therefore has eight data pins (D0–D7), three select pins (S2 S1 S0), one enable, and one Y output. A 4-to-1 device uses two select pins; a 2-to-1 device uses one; a 16-to-1 device uses four. The rule is strict: if you count data inputs and they are not a power of two, you are not looking at a single binary-addressed mux — you may be looking at several muxes with a common enable, or at an analogue switch array with a different pin-out.

Boolean form for a 4-to-1 mux with active-high enable E is:

Y = E · (D0·S1'·S0' + D1·S1'·S0 + D2·S1·S0' + D3·S1·S0)

If E is false, Y is forced to a defined inactive level (or open-collector off), regardless of data and select. That is how several mux packages are expanded: two 8-to-1 devices plus a 2-to-1 device, or two 8-to-1 devices with complementary enables, build a 16-to-1 selector without inventing a new MSI part.

Textbook TTL parts you should recognise by pin function, not by memorising every number, are the 74151 (8-to-1 with complementary Y and W outputs), 74153 (dual 4-to-1), 74157 (quad 2-to-1, often used to steer a 4-bit nibble from one of two sources) and 74150 (16-to-1). CMOS 74HC/HCT versions of the same functions appear on later cards. Analogue CMOS multiplexers such as the 4051 (8-channel), 4052 (dual 4-channel) and 4053 (triple 2-channel) pass a voltage rather than a logic level; they are the usual front-end when one ADC must scan many sensors.

Worked select code. On an 8-to-1 mux, S2 S1 S0 = 101 binary (decimal 5) connects D5 to Y, provided the enable is asserted. If the enable is the wrong polarity — a common wiring-diagram error — Y stays inactive for every select code and the circuit looks like a dead source.

Demultiplexers

A demultiplexer (demux, distributor) is the inverse: one data input, n select lines, 2^n outputs. The select code steers the single data bit (or analogue voltage) to one output; the other outputs stay inactive. A 1-to-8 demux therefore has three select pins and eight outputs. In TTL catalogues you often do not buy a part labelled “demultiplexer”; you buy a decoder with an enable, and you feed the serial data into that enable. The 74138 3-to-8 decoder used as a demux is the standard teaching identification: address pins select which output may go active, and the data pin (on G1 or a G2 input) decides whether that output actually pulses. That is why topic 5.8 (decoders) and topic 5.9 (multiplexers/demultiplexers) sit next to each other on the syllabus — the same MSI package can be either function depending on how the enable is driven.

A mux followed by a demux with the same select code reconstructs the original parallel sources after they have shared one wire. If the select codes are not common — different clocks, different wiring, or a stuck select bit — the reconstructed channels appear swapped or silent. That is a classic ground-test pattern on analogue scanning systems: one thermocouple channel reads another sensor’s temperature.

Enable, expansion and identification on logic diagrams

The enable (G, E, EN, or STROBE) is not optional decoration. It qualifies the whole device. Active-low enables are drawn with a bubble; two active-low enables ANDed inside the package (74151, 74138) must both be low. Cascading uses the enable as a higher-order address bit. When you identify the symbol on an aircraft logic diagram, look for this cluster together:

• Function name MUX, DMUX, DATA SEL, 8-1, 4-1, or 1-8.
• A trapezoid or rectangular IEC box with many data pins on one face and a single Y (and maybe W) on the other.
• Select/address pins labelled S0, S1, S2 or A, B, C, often with binary weights 1-2-4.
• An enable pin, frequently active-low.
• For analogue switches, a bidirectional analogue-path symbol rather than a logic Y, plus a VEE pin on some 4000-series parts.

Do not confuse a mux with a decoder. A decoder has n inputs and 2^n outputs and no “data” pin other than enables. Do not confuse a mux with a priority encoder: the encoder compresses many inputs into a code; the mux uses a code to pick one input. A rectangle with only clock and Q/Q-bar is a flip-flop, not a multiplexer. Four BCD pins and seven segment pins are a BCD-to-7-segment decoder from section 8.1, not a mux.

Time-division versus frequency-division multiplexing

Two different sharing methods appear in avionics teaching and must not be swapped.

Time-division multiplexing (TDM) assigns the shared path to one source at a time. In digital hardware that is exactly what a mux does: during slot 5, D5 owns the output. Sampled analogue systems do the same: a 4051 steps through sensors, an ADC converts each voltage, and software labels the result. Aircraft data buses are TDM in the broad sense that successive words occupy the same wire at successive times — an ARINC 429 pair carries many labels, one 32-bit word after another, rather than one dedicated pair per parameter. Display refresh and discrete scanners are also TDM.

Frequency-division multiplexing (FDM) assigns each channel a different carrier frequency so several signals can occupy the medium at the same instant. VHF communications, navigation beams and some analogue audio/video distribution are FDM problems. You do not select FDM channels with a 74151; you select them with tuned filters, mixers or a radio. Mention FDM in a Module 5.9 answer only as the contrasting method: same idea of sharing, different physical mechanism.

A mixed aircraft example is an analogue input card in a remote concentrator: CMOS analogue mux (TDM scanning) feeds an ADC; the digital results then share a data bus (TDM words); the VHF voice that the crew hears on the same aeroplane is still FDM at radio frequency. The maintenance implication is different in each layer. A stuck select line on the analogue mux aliases every channel to one sensor. A bus-label fault loses parameters by identity, not by carrier. An FDM radio fault is a receiver/transmitter problem, not an MSI data-selector problem.

Aircraft analogue and digital applications

Analogue multiplexing exists wherever many slowly changing voltages would otherwise each need a dedicated ADC and a long wire. Engine and airframe thermocouples, resistance temperature detectors, fuel-quantity tank probes, potentiometric position sensors, and older inertial-system synchro/resolver chains are scanned this way. The mux must preserve analogue accuracy: on-resistance, leakage and break-before-make switching matter, which is why analogue CMOS parts, not TTL 74151s, are used in that role. Digital multiplexing exists wherever many logic sources share a pin, a backplane or a display: nibble steering with 74157 devices, interrupt or discrete concentration, and the select logic in front of a shared UART or ARINC controller.

When you read a logic diagram in the aircraft wiring manual, name the block first (mux or demux), count data pins against 2^n, count select pins against n, note enable polarity, and only then trace the selected channel. If the count does not fit 2^n, look for cascaded packages or for an analogue switch that is not binary-addressed in the way the TTL data selector is. That identification sequence develops the “identification in logic diagrams” language from the former detailed 5.9 description.