11.1 Physics of Electrostatic Charge and Device Susceptibility

11.1 Physics of Electrostatic Charge and Device Susceptibility

EASA Part-66 Appendix I topic 5.12, as set out in Commission Implementing Regulation (EU) 2023/989 (applicable from 12 June 2024), requires electrostatic sensitive device (ESDS) knowledge at level 2 for categories B1 and B2/B2L and level 1 for categories A and B3. Module 5 is a multiple-choice paper only: B2 sits 72 questions in 90 minutes, B1 sits 40 questions in 50 minutes, and A/B3 sit 20 questions in 25 minutes, with a 75% pass mark, no negative marking, and no essay. The live paper uses three options; the practice items in this chapter use four.

The pre-12 June 2024 detailed description for 5.12 asked for special handling, risks and damage from improper handling, and personnel and component anti-static protection; current Appendix I retains the heading and category levels. Those procedures only make sense if you first understand how charge appears on a person or a bag, why a high voltage need not mean a large energy, and why complementary metal-oxide-semiconductor (CMOS) and other metal-oxide-semiconductor (MOS) gates die at voltages a technician cannot feel.

Triboelectric charging

Triboelectric charging is charge transfer caused by contact and separation of dissimilar materials. Electrons move from one surface to the other. The material that loses electrons becomes positively charged; the material that gains electrons becomes negatively charged. The ordered list of materials by that tendency is the triboelectric series, but the hangar does not require you to memorise every entry. What matters is that everyday plastics, synthetic clothing, vinyl seat covers, adhesive tape, polyethylene bags and dry carpet are efficient charge generators when they rub, peel or slide.

A charged conductor (a human body, a metal tray, an LRU chassis) shares that charge across its surface. Touching a pin then dumps the charge through a small contact area in nanoseconds. A charged insulator (a plastic bag, a polystyrene block, a roll of tape) holds charge in patches that cannot be drained by clipping one corner to earth. That is why claiming to be safe after touching a bench is false when the threat is a charged bag next to an exposed module.

Dry air makes charging worse because moisture on surfaces provides a slow leakage path. Heated hangars in winter, air-conditioned avionics shops and desert line stations routinely sit at relative humidities where a few steps across carpet produce several kilovolts on the body. The person feels nothing: the current during generation is tiny. The damage occurs later, at the moment of discharge into a device pin.

Typical industry teaching figures (ESD Association style tables, not an EASA Appendix I voltage list) show how strongly humidity matters:

Treat the kilovolt columns as order-of-magnitude teaching values. Do not quote them as a single official EASA limit. The examinable point is that ordinary motion in a dry workshop can charge a person to thousands of volts, while a MOS gate oxide may survive only tens of volts.

Voltage, charge and energy

Electrostatic voltage V, charge Q and capacitance C are linked by:

Q = C V

Stored energy is:

E = ½ C V²

Voltage is what the gate oxide sees as electric field. Energy is what is available to melt metal or grow a filament. A small capacitance at a spectacular voltage can still store only a modest energy; a larger capacitance (a charged printed-circuit board, a metal tote) can store more energy at a lower voltage. Candidates who treat 35 kV as automatically more destructive than 500 V miss charged-device events, which are contrasted with the Human Body Model below.

The human body is modelled as a capacitor of about 100 pF to 300 pF to its surroundings. The usual teaching Human Body Model (HBM) fixes that capacitance at 100 pF.

Worked example — HBM stored energy

Take C = 100 pF = 100 × 10⁻¹² F = 1.00 × 10⁻¹⁰ F and a charged person at V = 2 000 V.

V² = (2 000)² = 4.00 × 10⁶

C V² = 1.00 × 10⁻¹⁰ × 4.00 × 10⁶ = 4.00 × 10⁻⁴

E = ½ C V² = 2.00 × 10⁻⁴ J = 200 µJ = 0.20 mJ

Two hundred microjoules will not burn a finger. Concentrated into a gate-oxide area of a few square micrometres, it is more than enough to punch a hole in silicon dioxide. Repeat at 4 000 V: V² quadruples, so energy quadruples to 800 µJ. Energy scales with the square of voltage: doubling the body voltage quadruples the available energy.

Charge in the same 2 kV example:

Q = C V = 1.00 × 10⁻¹⁰ × 2 000 = 2.00 × 10⁻⁷ C = 200 nC

If that charge were shared onto a 10 pF device-pin capacitance, the pin voltage would try to rise by ΔV = Q / C_pin = 200 nC / 10 pF = 20 000 V before clamping and breakdown steal the charge. The device never reaches 20 kV in a controlled way; the oxide or a protection structure collapses first. The arithmetic shows why a person at 2 kV is not a small threat to a picofarad gate.

MOS and CMOS gate-oxide susceptibility

A MOS transistor controls drain current with voltage on a gate that is isolated from the channel by a thin silicon-dioxide (SiO₂) layer. CMOS uses complementary n-channel and p-channel MOS transistors on the same chip and is the logic family inside almost every modern avionics processor, memory, field-programmable gate array, display driver, analogue-to-digital converter and databus transceiver.

The oxide is a dielectric. Dielectric strength of SiO₂ is typically about 5–10 MV/cm (5–10 × 10⁸ V/m) in teaching figures. Breakdown voltage is field times thickness:

V_BD ≈ E_BD × t_ox

Worked example — gate-oxide breakdown voltage

Take a teaching oxide thickness t_ox = 20 nm = 20 × 10⁻⁹ m = 2.0 × 10⁻⁸ m and E_BD = 8.0 × 10⁸ V/m (8 MV/cm).

V_BD = 8.0 × 10⁸ × 2.0 × 10⁻⁸ = 16 V

A 10 nm oxide under the same field yields about 8 V. Older, thicker oxides used in some power MOSFETs may stand tens of volts on the gate, which is still two orders of magnitude below a 2 kV body. That is the Module 5 reason CMOS/MOS parts are the most electrostatic-sensitive devices commonly handled on the aircraft: the gate oxide ruptures at tens of volts, whereas many bipolar junctions and ordinary diodes need hundreds of volts to much higher HBM stress before they fail.

On-chip ESD protection networks (clamps, diodes, spark gaps at the pads) try to divert the pulse around the gates. They are sized to a stated HBM class on the component datasheet. They are not a licence to skip handling procedures. A protection network that survived one unrecorded shop discharge may be weakened (section 11.2) even if the unit still powers up.

Bipolar transistors fail by junction heating and metallisation melt. Those mechanisms need more energy and usually higher HBM voltages than gate-oxide puncture, which is why a bench that never killed an older analogue box can still destroy a CMOS display computer.

The Human Body Model as the typical teaching circuit

Workshop ESD is not one waveform. Three models appear in component qualification literature:

1. Human Body Model (HBM). A charged person touches a device. The usual teaching circuit is 100 pF discharged through about 1.5 kΩ into the pin. Peak current is roughly V/R: at 2 kV, 2 000 / 1 500 ≈ 1.3 A for a fraction of a microsecond. Rise times are tens of nanoseconds.

2. Charged Device Model (CDM). The device or board is charged (by sliding in a bag, by an electric field, by a charged insulator) and then a pin touches earth. The capacitance is the package itself, the resistance is very low, and the pulse is faster. CDM can destroy parts at voltages that look safe on an HBM poster.

3. Machine Model (MM). A charged metallic object, historically 200 pF with very low series resistance. It is less used in new qualification but still explains damage from an ungrounded tool or trolley.

Appendix I does not name HBM, CDM or MM. This study guide uses HBM as the typical teaching model because it matches the charged-technician story behind wrist straps (section 11.3) and because it gives examinable numbers: 100 pF, 1.5 kΩ, ½CV². Do not treat HBM as the only real event, and do not invent an EASA-mandatory HBM pass voltage for every LRU.

[!NOTE] Voltage versus energy exam trap: A field meter reading 10 kV on a plastic cover reports voltage, not energy. The cover may couple a damaging CDM event into a nearby CMOS pin without delivering 200 µJ from a 100 pF HBM capacitor. Conversely, 200 µJ from a 2 kV person is already enough to rupture a 16 V oxide. Always ask what capacitance is charged and where the discharge current is forced to flow.

B1 and B2 candidates at level 2 should compute ½CV², state why MOS gates die at tens of volts, and name HBM as 100 pF through about 1.5 kΩ. Category A and B3 at level 1 should recognise that walking and plastic bags generate kilovolts and that CMOS modules need special handling even though the shock is imperceptible.