11.6 Positive & Negative Logic and Truth Tables
Key Takeaways
- In a positive-logic circuit the high level represents logic 1
- In a negative-logic circuit the high level represents logic 0 - the convention is inverted, not the voltages
- A truth table is a list of input combinations and their corresponding outputs that characterises a digital device's function
- Trace a logic diagram gate by gate from the inputs, writing the level at each test point before moving on
- The pool's figure-based items assume positive logic unless the question says otherwise
11.6 Positive & Negative Logic and Truth Tables
Quick Answer: Positive logic: HIGH = 1. Negative logic: HIGH = 0. A truth table is a list of input combinations and their corresponding outputs that characterises a device's function. Figure-based pool items assume positive logic and are solved by tracing gate by gate.
Sub-topic 3-E-035 (Logic Levels) splits cleanly into two halves: a pair of definition questions about logic convention, and three diagram-tracing questions where you must read levels at test points A, B and C.
Positive and negative logic
The voltage levels themselves never change. What changes is which voltage you agree to call a 1.
| Convention | Logic 1 | Logic 0 |
|---|---|---|
| Positive logic | High level | Low level |
| Negative logic | Low level | High level |
The pool asks both directions:
- "In a positive-logic circuit, what level is used to represent a logic 1?" → High level.
- "In a negative-logic circuit, what level is used to represent a logic 0?" → High level.
Read those two answers together and the symmetry is obvious: the answer is "high level" both times, because the second question asks about logic 0 under the inverted convention. Candidates who skim and answer "low level" for the second one have not noticed the digit changed.
Why negative logic exists
It is not perversity. Many real signals are active-low — a chip-select, a reset, an interrupt request, an enable — because a bipolar output sinks current far better than it sources it, so pulling a line down is the electrically stronger action. When a designer labels a pin RESET with an overbar, the assertion of that function is a low level, and describing that portion of the circuit in negative logic keeps the documentation honest.
A single gate can even be read two ways. A device that is a NAND in positive logic is a NOR in negative logic — the same silicon, described under two conventions. That duality is why schematics use bubbles on inputs and outputs to make the active level explicit rather than relying on the gate name alone.
Truth tables
What is a truth table? A list of input combinations and their corresponding outputs that characterizes a digital device's function.
Every word of that definition earns its place:
- List of input combinations — every one of them. For n inputs there are 2ⁿ rows: 2 inputs → 4 rows, 3 inputs → 8 rows, 4 inputs → 16 rows.
- Corresponding outputs — one output column per output.
- Characterizes the function — the table is the specification. Two circuits with identical truth tables are functionally interchangeable however differently they are built.
The two-input basics, in positive logic:
| A | B | AND | OR | NAND | NOR | XOR |
|---|---|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 | 1 | 0 | 1 |
| 1 | 1 | 1 | 1 | 0 | 0 | 0 |
Two memory hooks that survive exam pressure: AND is 1 only when everything is 1; OR is 0 only when everything is 0. NAND and NOR are those two inverted, and XOR is 1 only when the inputs differ.
Tracing a logic diagram
Three of this sub-topic's six items show a figure and ask for the levels at test points A, B and C, assuming positive logic. There is no shortcut — but there is a reliable method:
- Write the given input levels directly on the diagram as 1s and 0s. Do not hold them in your head.
- Find every gate whose inputs are all known. Resolve those first, and write the result on its output line.
- Repeat. Each pass makes more gates resolvable, and the wave moves left to right.
- Account for every bubble. A bubble on an output inverts it; a bubble on an input inverts before the gate acts. Missing one bubble flips the whole downstream answer.
- Only then read off A, B and C and match against the option set.
The most common failure is skipping step 1 and trying to trace mentally through three gate levels. Write it down. On a real exam sheet you have the diagram in front of you and nothing forbids annotating your scratch paper.
A worked pattern
Take a NAND whose inputs are high and low. AND of (1,0) is 0; the bubble inverts it to 1. Feed that 1 plus another 1 into a second NAND: AND is 1, inverted to 0. Feed that 0 into an inverter: output 1. Three gates, three written intermediate values, no mental juggling.
Note that the pool's keyed answers for these items include combinations such as "A is low, B is high and C is high" and "A is high, B is high and C is high" — so do not assume the answer must have a mix of levels. Two of the three visible test points being identical is common.
Exam checklist
- Positive logic → high = 1; negative logic → high = 0
- Both convention questions key to "high level" — check which digit is being asked about
- Truth table = all input combinations with their outputs, 2ⁿ rows
- Diagram questions assume positive logic unless stated otherwise
- Annotate the figure; resolve gates whose inputs are all known; respect every bubble
In a positive-logic circuit, what level represents a logic 1, and in a negative-logic circuit, what level represents a logic 0?
What is a truth table?
A technician must determine the levels at three test points in a gate diagram given the input levels. What is the reliable method?
Why do designers describe parts of a circuit in negative logic rather than converting everything to positive logic?