10.2 Op Amps, PLLs, VCOs & Mixers
Key Takeaways
- Ideal op-amp rules for analysis: infinite open-loop gain, infinite input impedance, zero output impedance; negative feedback sets closed-loop gain
- Inverting closed-loop gain is −Rf/Rin; non-inverting closed-loop gain is 1 + Rf/Rg; the inverting input sits at virtual ground in the classic inverter
- A phase-locked loop (PLL) compares phase, filters the error, and steers a voltage-controlled oscillator (VCO) — a stage whose output frequency is set by a DC control voltage — until the output locks to the reference
- Mixers produce sum and difference products of two inputs (heterodyning); superhet receivers convert RF to a fixed IF using LO − RF or LO + RF products
- A direct digital synthesizer chains a phase comparator, look-up table, DAC and a low-pass anti-alias filter; its impurities are discrete spurs, whereas a PLL produces broadband noise
10.2 Op Amps, PLLs, VCOs & Mixers
Quick Answer: Ideal op-amp: infinite open-loop gain, infinite Zin, zero Zout; feedback sets gain. Inverting gain = −Rf/Rin; non-inverting = 1 + Rf/Rg. PLL = phase detector + loop filter + VCO → lock to reference. VCO frequency follows control voltage. Mixer outputs sum and difference frequencies (heterodyning)—the heart of the superhet.
Passive tanks set frequency and selectivity. Active practical circuits amplify cleanly, lock frequency, tune by voltage, and translate spectra from RF to IF. Element 3 Topic 3-D expects you to recognize these blocks by behavior, not to design a custom IC layout.
Operational amplifiers — the ideal model
An operational amplifier (op amp) is a high-gain differential amplifier with inverting (−) and non-inverting (+) inputs and a single-ended output (classic symbol: triangle).
Ideal op-amp rules used on exams and benches
| Ideal assumption | Meaning for analysis |
|---|---|
| Infinite open-loop voltage gain | Tiny differential input voltage produces large output (until rails limit) |
| Infinite input impedance | No current into the + or − pins (ideal) |
| Zero output impedance | Output is a perfect voltage source within current limits |
| Zero input offset (teaching ideal) | Output zero when inputs equal |
| Infinite bandwidth (ideal) | Real parts roll off; closed-loop BW still finite |
With negative feedback, the op amp adjusts its output so the differential input voltage is forced nearly to zero (the two inputs are at the same voltage). That single idea unlocks virtual ground and the closed-loop gain formulas.
Inverting amplifier
Signal enters through Rin to the inverting input; feedback resistor Rf from output to inverting input; non-inverting input grounded.
[ A_v = \frac{V_{\mathrm{out}}}{V_{\mathrm{in}}} = -\frac{R_f}{R_{\mathrm{in}}} ]
| Feature | Value |
|---|---|
| Closed-loop gain | −Rf / Rin (magnitude Rf/Rin) |
| Phase | 180° inversion |
| Inverting-node voltage | Virtual ground (≈ 0 V) with feedback |
| Input resistance (approx) | ≈ Rin |
Why virtual ground? Negative feedback holds the inverting input at the same potential as the grounded non-inverting input—about 0 V—while current through Rin continues through Rf (ideally no pin current).
Worked example — inverting gain
Rin = 10 kΩ, Rf = 100 kΩ:
[ A_v = -\frac{100}{10} = -10 ]
A 0.1 V peak input → −1.0 V peak output (within supply rails). Swap to Rf = 47 kΩ → gain ≈ −4.7.
Non-inverting amplifier
Signal drives the non-inverting input. Feedback divider Rg (ground) and Rf (to output) sets the fraction returned to the inverting input.
[ A_v = 1 + \frac{R_f}{R_g} ]
| Feature | Value |
|---|---|
| Closed-loop gain | 1 + Rf/Rg (always ≥ 1 for this topology) |
| Phase | No inversion |
| Input resistance | Very high (≈ op-amp Zin with feedback) |
| Unity-gain special case | Rf = 0 or follower wiring → voltage follower, gain = 1 |
Worked example — non-inverting gain
Rf = 22 kΩ, Rg = 10 kΩ:
[ A_v = 1 + \frac{22}{10} = 3.2 ]
Op-amp roles in radio equipment
| Application | Typical topology |
|---|---|
| Audio mic preamp / line amp | Non-inverting or inverting with defined gain |
| Active filter / tone control | Op amp + RC feedback networks |
| DC servo / AGC control amp | Integrator-like or high-gain error amp |
| Buffer between stages | Voltage follower |
| Comparator (open-loop or with positive feedback) | Threshold detection, squelch logic |
Supply note: Real op amps need power rails (split ± or single-supply with bias). Clipping against the rails is the usual limit when calculated gain × input exceeds available swing—exactly what you see as flat-topped audio on a scope.
Voltage-controlled oscillators (VCOs)
A VCO produces an AC output whose frequency depends on a control voltage. Raise the tuning voltage and f_out rises (or falls, depending on design); the control law is often approximately linear over a design range.
| Piece | Role |
|---|---|
| Resonator / multivibrator core | Sets free-run frequency band |
| Varactor or voltage-variable element | Steers C (or timing) with DC |
| Buffer | Isolates load pull |
| Control voltage pin | Synthesizer, PLL, or modulation input |
FM connection: If the control voltage carries audio, the VCO becomes a direct FM generator. If the control voltage is a filtered PLL error, the VCO becomes the tunable LO inside a synthesizer.
GROL maintainers meet VCOs as “the LO synthesizer brick” on modern VHF marine, aviation COM, and HF gear: wrong lock voltage, open varactor bias, or contaminated control line → off-frequency or unlocked operation.
Phase-locked loops (PLLs)
A phase-locked loop forces a VCO to track a reference in phase (and therefore in frequency, once locked).
Classic three-block PLL
Reference ──► Phase ──► Loop ──► VCO ──► Output
detector filter │
▲ │
└────── feedback ──┘
(often ÷N in synthesizers)
| Block | Function |
|---|---|
| Phase detector (PD) / phase-frequency detector | Compares reference phase to VCO (or divided VCO) phase; outputs error |
| Loop filter | Low-pass filters the PD output into a clean DC control voltage; sets loop dynamics |
| VCO | Converts control voltage to frequency; output is the locked oscillator |
In frequency synthesizers, a programmable divider (÷N) sits in the feedback path so
[ f_{\mathrm{out}} = N \times f_{\mathrm{ref}} ]
(or a fractional-N variant). Channel step size relates to reference and division architecture—the conceptual Element 3 point is lock the VCO to a stable reference via feedback.
Lock range vs capture range
| Term | Meaning |
|---|---|
| Lock range | Frequency range over which the PLL holds lock once already locked (often wider) |
| Capture range | Frequency range over which the PLL can acquire lock from an unlocked condition (often narrower) |
| Locked | VCO tracks reference; steady (or slowly modulated) control voltage |
| Unlocked / out of lock | Beat notes, hunting control voltage, wrong frequency, “fail” indicators on some gear |
Shop symptoms of unlock: no transmit on frequency, receiver dead on channel, synthesizer unlock LED/alarm, warbling or multiple spurs. Causes include wrong reference (dead TCXO), bad loop filter caps, VCO not covering band, programming error on ÷N, or supply ripple on the control line.
PLL uses in radiotelephone gear
- Channelized LO synthesis for RX/TX.
- Carrier recovery or coherent detectors in some data modes.
- Clock cleaning / reference distribution on digital radio boards.
- FM demodulation (PLL discriminator topologies)—advanced but same blocks.
Mixers and heterodyning
A mixer is a nonlinear (or switching) circuit with two inputs that produces output components at the sum and difference of the input frequencies—and usually the originals and harmonics depending on topology.
If inputs are f1 and f2:
[ f_{\Sigma} = f_1 + f_2, \quad f_{\Delta} = |f_1 - f_2| ]
Heterodyning is the process of mixing to translate a signal from one frequency to another. The superheterodyne receiver is named for this: RF is mixed with a local oscillator (LO) to create a fixed intermediate frequency (IF) that is easy to filter and amplify.
Superhet conversion (conceptual)
| High-side LO example | Math |
|---|---|
| RF signal | f_RF |
| Local oscillator | f_LO > f_RF |
| Difference product (IF) | f_IF = f_LO − f_RF |
| Sum product | f_LO + f_RF (filtered out) |
| Low-side LO | f_IF = f_RF − f_LO |
Image frequency: another RF that also mixes to the same IF. Image rejection is why preselectors and high first IFs exist—preview of receiver chapters, but the mixer sum/difference idea starts here.
Mixer types you will see named
| Type | Notes |
|---|---|
| Diode ring / doubly balanced mixer | Strong LO, good balance, common RF brick |
| Switching / commutating mixer | FETs or Gilbert cell; LO as switch drive |
| Transistor single-ended mixer | Simple; more spurs |
| Product detector | Mixer used as SSB/CW demodulator with BFO/carrier |
Worked example — IF generation
Marine channel RF 156.8 MHz, LO 146.3 MHz (teaching numbers):
[ f_{\Delta} = 156.8 - 146.3 = 10.5,\mathrm{MHz} \quad (\mathrm{IF}) ]
[ f_{\Sigma} = 156.8 + 146.3 = 303.1,\mathrm{MHz} \quad (\mathrm{filtered, away}) ]
Same LO on transmit chains can up-convert a modulated IF to the antenna frequency—mixers are bidirectional spectral tools, not “RX only” parts.
How the four blocks cooperate on one radio
Walk a modern synthesized VHF transceiver:
- Reference oscillator (TCXO) feeds the PLL.
- PLL locks a VCO to N × f_ref → channelized LO.
- Mixer combines LO with incoming RF → IF.
- Op amps condition audio, AGC voltages, and squelch analog paths after detection.
| Block | One-line Element 3 identity |
|---|---|
| Op amp | High-gain differential amp; closed-loop gain set by feedback resistors |
| Inverting amp | Gain −Rf/Rin; virtual ground at − input |
| Non-inverting amp | Gain 1 + Rf/Rg |
| VCO | f_out controlled by voltage |
| PLL | PD + filter + VCO; lock/capture to reference |
| Mixer | Sum and difference products; heterodyning |
Exam-day checklist for op amps, PLLs, VCOs, mixers
- Ideal op-amp: infinite gain, infinite Zin, zero Zout (analysis model).
- Inverting: −Rf/Rin; non-inverting: 1 + Rf/Rg.
- Virtual ground on the classic inverter’s summing junction.
- PLL locks VCO to reference via phase detect + loop filter.
- Lock holds; capture acquires—capture often narrower.
- VCO = voltage steers frequency.
- Mixer → sum and difference; superhet IF = |LO ± RF| chosen product.
With tanks from §10.1 and these active blocks, you can describe how a radio both selects a frequency and generates/translates it. The final section of this chapter teaches you to read the schematic and signal-flow path that wires all of those pieces together.
The direct digital synthesizer block chain (name every block)
Sub-topic 3-D-031 asks which frequency synthesizer circuit uses a phase comparator, look-up table, digital-to-analog converter, and a low-pass antialias filter. The answer is a direct digital synthesizer (DDS) — and the value of the question is that it names the whole chain. Candidates who can say "DDS uses a look-up table and a DAC" still miss it, because they stop before the filter.
| Block | What it does |
|---|---|
| Phase comparator / accumulator | Advances a phase value by a fixed increment on every clock tick; the increment sets the output frequency |
| Look-up table | Converts each phase value into the corresponding amplitude of a sine wave |
| Digital-to-analog converter (DAC) | Turns that amplitude number into a stepped analogue voltage |
| Low-pass anti-alias filter | Smooths the steps and removes the sampling images above the Nyquist frequency |
The anti-alias filter is not optional cosmetics. A DAC clocked at f_clk produces not only the wanted output but mirror images at f_clk ± f_out, 2f_clk ± f_out and so on. Without the low-pass filter those images leave the synthesizer as real, radiated spurious emissions.
In a direct digital synthesizer, what are the unwanted components on its output? Spurs at discrete frequencies. Note the contrast the pool draws with the PLL: what spectral impurity components might be generated by a phase-locked-loop synthesizer? Broadband noise. Two different synthesizers, two different failure signatures:
| Synthesizer | Characteristic impurity |
|---|---|
| DDS | Spurs at discrete frequencies — from DAC quantisation, truncation of the phase word, and residual images |
| PLL | Broadband noise — phase noise skirts around the carrier |
That distinction is directly useful on a spectrum analyzer: discrete pickets either side of the carrier point at a DDS; a raised noise pedestal points at a PLL.
What is the closed-loop voltage gain of an ideal inverting op-amp amplifier with input resistor Rin and feedback resistor Rf?
Which statement best describes a phase-locked loop and a voltage-controlled oscillator?
What frequency products does a mixer produce from two sinusoidal inputs, and what is that translation process called in receivers?
For an ideal op-amp analysis model and a non-inverting amplifier with Rf = 30 kΩ and Rg = 10 kΩ, which pair is correct?