11.7 Memory Types & Microprocessor Concepts

11.7 Memory Types & Microprocessor Concepts

Quick Answer: RAM = written or read, address accessed randomly. ROM = fixed pattern stored in the matrix. DRAM = the RAM that must be refreshed periodically. 4 address pins × 4 data pins = 2⁴ × 4 = 64 cells. IO = input-output. A microprocessor's sequence of commands and instructions is a program.

Sub-topic 3-E-038 (Memory) is vocabulary plus one calculation. The vocabulary is standard but the pool words its questions in a distinctive way, so match the phrasing.

The three memory types the pool names

What "random access" actually means

It does not mean the data is random, and it does not mean access is unpredictable. It means any address can be reached directly, in the same time as any other — as opposed to sequential access, where you must pass through everything in between (magnetic tape being the classic counter-example). Both RAM and ROM are random-access in that sense; "RAM" simply became the name that stuck for the writable kind.

Why DRAM needs refreshing

DRAM stores each bit as a charge on a tiny capacitor. Capacitors leak. Left alone, the charge decays and the bit is lost within milliseconds, so a refresh cycle reads and rewrites every row on a repeating schedule.

The trade is deliberate: one transistor and one capacitor per DRAM cell against four to six transistors per SRAM (static RAM) cell. DRAM is therefore far denser and cheaper per bit, at the cost of refresh circuitry and access complexity. SRAM holds its data as long as power is applied and needs no refresh, so it is used where speed matters most — cache and small buffers.

When the pool asks which random-access memory must be refreshed, the answer is DRAM, not RAM generally and not SRAM.

The cell-count calculation

How many individual memory cells would be contained in a memory IC that has 4 data bus input/output pins and 4 address pins for connection to the address bus? 64.

Work it in two steps:

1. Address pins set the number of locations. n address pins address 2ⁿ locations. With 4 address pins: 2⁴ = 16 locations.
2. Data pins set the width of each location. 4 data pins means each location holds 4 bits.
3. Total cells = locations × width = 16 × 4 = 64.

The trap is answering 16 (locations only) or 8 (simply adding the pins). The question asks for individual memory cells, and a cell holds one bit. Note how steeply this scales: every extra address pin doubles the capacity, which is why ten address lines already reach 1K locations.

Microprocessor vocabulary

What does the term "IO" mean within a microprocessor system? Input-output.

I/O is everything the processor uses to reach the world beyond its own bus — ports, UARTs, ADCs and DACs (section 11.8), display drivers, keypads. In a radio, the I/O is what connects the microprocessor to the synthesiser, the display, the front-panel controls and the DSC controller.

What is the name for a microprocessor's sequence of commands and instructions? A program.

Plain, and the pool means the plain answer. Related vocabulary worth holding:

Why a radio technician cares

Every modern transceiver on a GROL technician's bench is a microprocessor system. The ROM or flash holds the firmware; RAM holds working values, scan lists and channel memories; the address and data buses connect them; and the I/O reaches the synthesiser, the display, and the DSC controller. When a set powers up dead, loses its channel memories, or corrupts its display, you are looking at exactly these blocks — which is why the pool puts memory vocabulary in a licence exam for radio maintainers rather than in a computing exam.