9.3 Device Selection, Ratings & Thermal Design
Key Takeaways
- Select active devices by voltage, current, power, frequency (fT / beta cutoff), gain, and package ratings that meet or exceed circuit demands with a safety margin
- Derating reduces allowed dissipation and current as ambient temperature or altitude rises; never run continuous load at the absolute maximum rating as a design center
- Heat sinks lower case-to-ambient thermal resistance so junction temperature stays below TJ(max); thermal resistance θJA / θJC is the design language of power stages
- RF stages may require matched or sorted devices, proper bias sharing, and layout symmetry; failure modes include thermal runaway, secondary breakdown, ESD gate puncture, and solder/heat damage
- GROL substitution rules: match polarity and configuration, meet or exceed V/I/P/f ratings, preserve pinout or adapt carefully, restore heat sinking, and verify linear vs switching bias after repair
9.3 Device Selection, Ratings & Thermal Design
Quick Answer: Choose devices by V / I / P / f / gain / package with derating. Keep junction temperature under T_J(max) using heat sinks and thermal resistance (θ). Match RF devices and bias when the stage requires it. After failure analysis (thermal, ESD, SOA, wrong bias), substitute only with equal or better ratings, correct polarity/configuration, restored cooling, and re-checked linear vs switching operation.
Naming alpha, beta, FETs, and LEDs gets you through recognition questions. Keeping transmitters and receivers alive after a failed final, driver, regulator, or indicator is a selection-and-thermal skill. This section is written for the GROL maintainer role: adjust, repair, and maintain—not just memorize datasheet buzzwords.
Absolute maximum ratings — the non-negotiables
Every discrete semiconductor datasheet lists absolute maximum ratings. Exceed them and the manufacturer no longer guarantees survival—even for a millisecond in some cases.
| Rating (examples) | Meaning for the tech |
|---|---|
| V_CEO / V_DSS | Max collector-emitter or drain-source voltage |
| V_CBO / V_EBO | Junction reverse voltages (BJT) |
| I_C / I_D continuous | Max continuous current |
| I_CM / pulsed | Short-pulse current (if specified) |
| P_D | Max power dissipation at stated case/ambient temperature |
| T_J(max) | Maximum junction temperature |
| f_T / f_β | Transition / beta-cutoff frequency — must fit the RF band |
| hFE range | Gain band for linear stages and bias design |
Rule: design and substitute so that normal peaks stay well inside absolute maxima. Absolute max is a cliff, not a cruise altitude.
Diode-side reminder (selection overlap)
Junction diodes (and LED I_F limits) reiterate the same philosophy: maximum forward current and PIV are the two most common diode specs; junction temperature limits how much forward current you may push. LEDs still want ~20 mA class design with a series resistor unless the part is a high-power illuminator with its own thermal path.
Derating — why 100% of the max is not a design target
Derating means intentionally using only a fraction of a rating as temperature, altitude, or reliability goals get harder.
| Stress | Typical derating practice |
|---|---|
| Ambient temperature rises | Allowed P_D falls along the datasheet derating curve |
| High altitude / thin air | Convection cooling worsens; lower dissipation or more sink area |
| Reliability / continuous key-down | Run well below pulsed or absolute limits |
| Voltage | Leave headroom for inductive kicks and VSWR-induced peaks |
If a transistor is rated 25 W at T_C = 25 °C, it will not safely dissipate 25 W at a hot cabinet temperature with a small sink. Always read the derating curve or compute from thermal resistance.
Thermal design and heat sinks
Power is heat at the junction. Heat must flow: junction → case → heat sink → ambient.
Thermal resistance language
[ T_J = T_A + P_D \times \theta_{JA} ]
or, with a sink:
[ T_J = T_A + P_D (\theta_{JC} + \theta_{CS} + \theta_{SA}) ]
| Symbol | Path |
|---|---|
| θ_JC | Junction-to-case |
| θ_CS | Case-to-sink (insulator/grease) |
| θ_SA | Sink-to-ambient |
| θ_JA | Junction-to-ambient (no external sink path combined) |
Heat sink purpose: reduce θ_SA (and thus θ_JA) so that for a given P_D, T_J stays under T_J(max) with margin.
Worked example — PA driver transistor
A driver dissipates 4 W average in a cabinet where ambient is 50 °C. Device T_J(max) = 150 °C. You need T_J ≤ 125 °C for reliability margin (25 °C safety).
Allowed temperature rise: 125 − 50 = 75 °C.
[ \theta_{JA,\mathrm{max}} = \frac{75}{4} = 18.75,^\circ\mathrm{C/W} ]
If the bare TO-220 θ_JA is ~60 °C/W, you must add a heat sink (and proper insulator/grease) to pull total thermal resistance under ~18.8 °C/W. No sink → T_J ≈ 50 + 4×60 = 290 °C → instant or rapid failure.
Shop thermal checklist
- Clean mating surfaces; use proper thermal compound or pad.
- Torque mounting hardware to spec—loose tabs raise θ_CS.
- Do not omit insulating washers when the tab is live (many TO-220 collectors/drains are the tab).
- Verify airflow; dust-clogged marine enclosures bake finals.
- After repair, monitor case temperature under key-down into a dummy load before returning the radio to service.
Package types and what they imply
| Package | Typical use | Thermal notes |
|---|---|---|
| TO-92 / SOT-23 | Small-signal BJT/FET | Mostly air-cooled; low P_D |
| TO-220 / TO-247 | Power BJT/MOSFET, regulators | Bolt to sink; tab often electrically live |
| TO-3 | Legacy power RF/audio | Chassis as sink; mica insulator common |
| Power SOIC / DPAK / D2PAK | Surface-mount power | Copper pour and vias are the sink |
| Ceramic RF power packages | VHF/UHF PA transistors | Flange mounting, controlled torque, BeO caution on old parts |
| LED T-1¾ / SMD | Indicators | Series R; high-power LEDs need MCPCB sinks |
Wrong package substitution can fail mechanically (vibration on a vessel) even if the silicon die is “equivalent.”
Matching devices in RF stages
RF amplifiers—especially push-pull, balanced mixers, and multi-transistor PA pallets—often need matched hFE, V_BE, or I_DSS so current shares evenly.
| Practice | Why |
|---|---|
| Matched pair / quad from same date code | Similar β and V_BE vs temperature |
| Emitter/source ballast resistors | Force current sharing if gains differ |
| Symmetric layout | Equal lead lengths reduce imbalance and parasitics |
| Same f_T class | Prevent one device from hogging RF current |
| Do not mix NPN with random high-β audio parts in RF finals | Wrong f_T, package inductance, and SOA |
Replacing only one device in a matched pair without checking the partner is a classic cause of repeat failures.
Failure modes GROL techs actually see
| Failure mode | Clues | Common causes |
|---|---|---|
| Thermal runaway (BJT) | Current climbs with heat; hot spot | Insufficient sink, no emitter ballast, bias drift |
| Secondary breakdown | Localized die melt at high V_CE × I_C | SOA violation, high VSWR on PA |
| ESD gate puncture (MOSFET/CMOS) | Dead or leaky gate, shifted threshold | Ungrounded handling, no wrist strap |
| Overcurrent / bond wire fuse | Open device | Shorted load, missing series R on LED, wrong fuse |
| Overvoltage avalanche | Shorted CE/DS | Lightning, inductive spike, missing clamp |
| Soldering heat damage | Intermittent or open after rework | Iron too hot/long; no heat shunt on sensitive semis |
| Wrong-region bias | Distortion, flat-topping, excess heat | Linear stage driven into saturation; switch left linear |
Soldering note from the bank: clip a heat sink (heat shunt) on a sensitive semiconductor lead when hand-soldering so excess iron heat does not destroy the junction—mechanical strength of the joint is not the purpose of that shunt.
Substitution rules for repair technicians
When the exact OEM part is unavailable—common on older marine and aviation gear—follow a disciplined ladder:
1. Identity and polarity
- NPN vs PNP, N-channel vs P-channel, enhancement vs depletion must match the circuit topology.
- Confirm pinout (E-B-C vs C-B-E vs D-G-S). Many “equivalents” reverse pins.
2. Electrical equal-or-better
| Parameter | Substitution rule |
|---|---|
| Voltage ratings | ≥ original |
| Current ratings | ≥ original |
| Power / thermal | ≥ original with the same or better sink |
| Frequency (f_T, noise) | Adequate for the band; do not under-spec RF finals |
| Gain | Close enough for bias network; retune bias if β differs a lot |
| Capacitances (C_ob, C_iss) | Especially critical in RF; wild mismatch → oscillation or loss |
3. Configuration and class of service
- A switching MOSFET with huge C_iss may fail as a drop-in RF linear part.
- An audio power BJT may lack f_T for VHF.
- LED substitutes need similar V_F and current; always keep the series resistor, recalculating if V_F changes.
4. Mechanical and thermal restore
- Reinstall mica/pad, grease, hardware, and chassis sink path.
- Reflow or retouch ground pours on SMDs that double as heat spreaders.
5. Post-repair verification
- Visual and continuity (no solder bridges; correct orientation).
- Bias voltages at rest (Class A: BE ~0.7 V silicon NPN, collector mid-rail as designed).
- Current draw idle vs keyed.
- RF power into dummy load, spectrum/quality checks as appropriate.
- Thermal check after several minutes of representative duty cycle.
6. Documentation
Log the substitute part number, date, and any bias resistor changes. Future techs—and you six months later—need that trail.
Putting ratings, heat, and substitution together
Imagine a failed NPN driver in an MF/HF marine SSB:
- Diagnose: shorted CE after high-SWR event → SOA / overvoltage story.
- Select: NPN, V_CEO higher than original, I_C and P_D with sink equal or better, f_T suitable for HF, similar package for the existing flange.
- Install: heat shunt while soldering small-signal nearby parts; full thermal interface on the driver.
- Bias: confirm Class A active region (BE forward, CB reverse), not latched in saturation.
- Test: dummy load, power, and temperature.
That workflow is Element 3 component knowledge applied the way a licensed radiotelephone technician actually works.
Closing Chapter 9
You can now:
- Describe BJT structure, α/β, configurations, and cutoff / active / saturation bias.
- Contrast FETs with BJTs, handle CMOS/MOSFET static risk, size LED resistors, and recognize optoisolators, varactors, piezo crystals, relays, and Pierce oscillators.
- Select, derate, heat-sink, match, and substitute active devices without creating the next failure.
Next chapters move from components into practical circuits—RLC networks, op-amps, PLLs, and schematic literacy—that wire these devices into working radio stages.
Why is derating used when selecting power transistors, and what is the primary purpose of a heat sink on a power device?
Which substitution practice is correct for a GROL technician replacing a failed RF-stage transistor?
A power transistor dissipates 4 W with 50 °C ambient. If θJA of the mounted assembly is 15 °C/W, what is the approximate junction temperature?
Which failure-mode pair is correctly matched for active devices in radio equipment?