4.3 Logic Diagrams, Boolean Algebra, and Control Logic

Key Takeaways

  • Logic diagrams are an explicitly named NCEES sub-topic under Instrumentation and Controls, listed alongside sensors and data acquisition.
  • An AND gate outputs 1 only when every input is 1; an OR gate outputs 1 when any input is 1; XOR outputs 1 only when the inputs differ.
  • De Morgan's theorems convert NOT(A AND B) into (NOT A) OR (NOT B) and NOT(A OR B) into (NOT A) AND (NOT B), which is how NAND and NOR circuits are simplified.
  • A truth table with n inputs has 2^n rows, and reading the rows where the output is 1 gives the sum-of-products expression directly.
  • In interlock and permissive logic, safety conditions are wired in series as an AND chain so that any single failed permissive blocks the start.
Last updated: August 2026

4.3 Logic Diagrams, Boolean Algebra, and Control Logic

The NCEES Instrumentation and Controls specification lists exactly three sub-topics: sensors, data acquisition, and logic diagrams. The first two are covered in the preceding two sections. This one is the most frequently skipped and the cheapest to learn — logic items are pure reasoning with no unit conversions and no handbook lookups, so they are among the fastest points available anywhere on the exam.

Gate Definitions and Truth Tables

A logic diagram represents a binary decision network. Each gate maps binary inputs to one binary output.

GateSymbol notationOutput is 1 when…Boolean form
AND$A \cdot B$All inputs are 1$Y = AB$
OR$A + B$At least one input is 1$Y = A + B$
NOT (inverter)$\bar{A}$The single input is 0$Y = \bar{A}$
NAND$\overline{A \cdot B}$Not all inputs are 1$Y = \overline{AB}$
NOR$\overline{A + B}$All inputs are 0$Y = \overline{A+B}$
XOR (exclusive OR)$A \oplus B$Inputs differ$Y = A\bar{B} + \bar{A}B$
XNOR$\overline{A \oplus B}$Inputs match$Y = AB + \bar{A}\bar{B}$

Two-input truth table for the core gates:

$A$$B$ANDORNANDNORXOR
0000110
0101101
1001101
1111000

A network with $n$ inputs requires $2^n$ truth-table rows: 3 inputs give 8 rows, 4 inputs give 16.

Boolean Algebra Identities

LawStatement
Identity$A + 0 = A$; $A \cdot 1 = A$
Null$A + 1 = 1$; $A \cdot 0 = 0$
Idempotent$A + A = A$; $A \cdot A = A$
Complement$A + \bar{A} = 1$; $A \cdot \bar{A} = 0$
Absorption$A + AB = A$; $A(A+B) = A$
Distributive$A(B+C) = AB + AC$; $A + BC = (A+B)(A+C)$
De Morgan$\overline{A \cdot B} = \bar{A} + \bar{B}$; $\overline{A + B} = \bar{A} \cdot \bar{B}$

De Morgan's theorems are the ones the exam tests. Read them in words: "not (both)" is the same as "either not", and "not (either)" is the same as "neither". Every NAND/NOR simplification question is a De Morgan question in disguise.

Worked Example: Simplify a Logic Expression

Simplify $Y = \overline{(\bar{A} + B)} + AB$.

Apply De Morgan to the first term: $\overline{(\bar{A} + B)} = A \cdot \bar{B}$.

Y=ABˉ+AB=A(Bˉ+B)=A1=AY = A\bar{B} + AB = A(\bar{B} + B) = A \cdot 1 = \boxed{A}

A five-gate network collapses to a wire. Verify with the truth table: when $A=0$, $\bar{A}+B$ is 1 so its complement is 0, and $AB = 0$, giving $Y=0$. When $A=1$ and $B=0$: complement of $(0+0)$ is 1, so $Y=1$. When $A=1$ and $B=1$: complement of $(0+1)$ is 0, but $AB=1$, so $Y=1$. Output tracks $A$ exactly. ✓

From Truth Table to Expression: Sum of Products

To read a Boolean expression off a truth table, take every row where the output is 1, write the AND term (minterm) that makes that row true, and OR the minterms together.

Consider a pump that should run when the tank level is low ($L$), the manual switch is on ($S$), and no fault is present ($F$):

$L$$S$$F$Run
0000
0100
1000
1101
1110

Only one row produces a 1, so the sum-of-products expression is a single minterm:

Run=LSFˉ\text{Run} = L \cdot S \cdot \bar{F}

That is a three-input AND with one inverted input — the canonical structure of a permissive chain.

Interlocks, Permissives, and Industrial Control Logic

Process control distinguishes two functions that map onto the two basic gates:

FunctionLogicPurposeFailure behavior
PermissiveAND — all conditions must be satisfiedAllows a start only when it is safe to startAny single unsatisfied permissive blocks starting
Interlock / tripOR — any condition tripsShuts equipment down when any hazard appearsAny single tripped condition stops the equipment
Redundant sensingAND of two sensors, or "2-out-of-3" votingSuppresses spurious trips from one bad sensorReduces nuisance trips; a single sensor failure does not trip

The safety logic asymmetry. Permissives are ANDed and trips are ORed, and both choices push the system toward the safe state. This is the same structure as the AND/OR gates in Fault Tree Analysis covered in the Safety, Health, and Environment chapter: an AND gate needs every input event to occur, so it models redundancy and yields a low combined probability; an OR gate needs only one, so it models single-point failure and yields a high combined probability.

Fail-Safe vs. Fail-Danger and Normally Closed Contacts

Safety-critical inputs are wired through normally closed contacts, so that a broken wire, a lost signal, or a power failure looks identical to a genuine trip and shuts the process down. A normally open contact would fail silently — a severed wire and a healthy safe condition are indistinguishable.

Enable=E-StopHighPressureLowLubeStartCmd\text{Enable} = \overline{\text{E-Stop}} \cdot \overline{\text{HighPressure}} \cdot \overline{\text{LowLube}} \cdot \text{StartCmd}

Reading Ladder Logic

Programmable logic controllers use ladder diagrams, in which each horizontal rung is one Boolean expression:

  • Contacts in series on a rung = AND
  • Contacts in parallel (branches) = OR
  • A slashed contact = NOT (normally closed)
  • The rightmost coil = the output

So a rung with three series contacts and one parallel branch around the middle contact reads $Y = A(B + C)D$. Series is AND, parallel is OR — that single mapping answers most ladder-logic items.

Worked Example: Two-out-of-Three Voting

A reactor trips on high temperature if at least two of three independent sensors read high. Write the logic and evaluate the trip probability if each sensor has a 2% chance of a spurious high reading.

Two-out-of-three voting ORs the three pairwise ANDs:

Trip=AB+BC+AC\text{Trip} = AB + BC + AC

For a spurious trip, at least two must falsely read high. With $p = 0.02$ each and independence, the probability that exactly two do is $3p^2(1-p) = 3(0.0004)(0.98) = 0.001176$, and that all three do is $p^3 = 0.000008$:

P(spurious trip)=0.001176+0.000008=0.001180.12%P(\text{spurious trip}) = 0.001176 + 0.000008 = 0.00118 \approx 0.12\%

Compare to a single sensor tripping the reactor directly, at $2%$. Two-out-of-three voting cuts nuisance trips by roughly a factor of 17 while still tripping if any two real sensors agree — which is why it is the standard architecture for high-consequence shutdowns.

Test Your Knowledge

Applying De Morgan's theorem, the expression NOT(A OR B) is equivalent to which of the following?

A
B
C
D
Test Your Knowledge

A logic network has four independent binary inputs. How many rows does its complete truth table contain?

A
B
C
D
Test Your Knowledge

In a process control system, three safety permissives are wired in series ahead of a motor starter. What happens if exactly one permissive is not satisfied?

A
B
C
D
Test Your Knowledge

Why are safety-critical trip inputs wired through normally closed contacts rather than normally open contacts?

A
B
C
D