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5.2 RF Power Amplifiers, Push-Pull Topologies, and Output Matching

Key Takeaways

  • A balanced push-pull amplifier drives matched devices 180∘180^\circ apart. Ideally, even harmonics cancel and odd harmonics combine; practical rejection depends on balance and must be checked with the output filtering.

  • For ideal sinusoidal push-pull operation, the full-winding differential voltage peak is 2(VCC−Vsat)2(V_{CC}-V_{\text{sat}}) and its peak-to-peak value is 4(VCC−Vsat)4(V_{CC}-V_{\text{sat}}). Total output power determines the differential load resistance.

  • Low-voltage solid-state power amplifiers exhibit extremely low collector/drain load impedances (RL′≈1 ΩR_L' \approx 1\ \Omega to 5 Ω5\ \Omega), requiring broadband ferrite transmission line transformers (TLTs) with discrete impedance transformation ratios (4:14:1, 9:19:1, 16:116:1) to match the standard 50 Ω50\ \Omega feedline.

  • In a grounded-grid HF triode amplifier, the grounded grid shields the cathode from the plate, reducing feedback. Neutralisation is normally unnecessary with suitable construction, while parasitic suppression and sound RF grounding remain necessary.

  • Pi and Pi-L networks match high valve plate impedances to 50 Ω50\ \Omega and attenuate harmonics. State the design-Q convention, calculate the complete network and verify filtering and component ratings; Q alone does not guarantee regulatory compliance.

Last updated: November 2026

5.2 RF Power Amplifiers, Push-Pull Topologies, and Output Matching

Designing a high-power RF amplifier requires coupling the active amplifying devices to transmission lines and antenna systems while maintaining absolute spectral purity and electrical stability. Because high-power solid-state transistors operate at very low impedances and high currents, whereas thermionic valves (vacuum tubes) operate at high voltages and low currents, each technology relies on specialized circuit topologies and impedance-matching networks.


1. Solid-State Power Amplifier (SSPA) Architectures and Push-Pull Operation

In modern amateur transceivers and solid-state power amplifiers, single-ended output stages are rarely used for power levels exceeding a few watts. Instead, the push-pull configuration is the dominant circuit architecture.

Circuit Configuration and Phase Relationships

A push-pull amplifier employs two identical, matched active devices (such as bipolar junction transistors, LDMOS, or VDMOS FETs) operated in phase opposition:

  1. Input Phase-Splitting Transformer (T1T_1): A broadband input transformer (balun) converts the single-ended 50 Ω50\ \Omega drive signal from the exciter into two equal-amplitude signals that are exactly 180∘180^\circ out of phase with respect to each other.
  2. Active Devices (Q1,Q2Q_1, Q_2): Device 1 receives +vin(t)+v_{\text{in}}(t) and Device 2 receives −vin(t)-v_{\text{in}}(t). In Class B each conducts for one half-cycle. Class AB has overlapping conduction around the crossover; in Class A both conduct throughout the cycle.
  3. Output Combining Transformer (T2T_2): The collectors or drains feed opposite ends of a center-tapped output transformer primary winding. DC supply voltage (VCCV_{CC} or VDDV_{DD}) is injected at the center tap. The transformer recombines the two antiphase output currents into a single-ended output port.

Mathematical Proof of Even-Harmonic Cancellation

The primary engineering advantage of a balanced push-pull amplifier is its inherent cancellation of all even-order harmonics (2f0,4f0,6f0,…2f_0, 4f_0, 6f_0, \dots).

The output currents of the two active devices can be expressed as Fourier/Taylor series expansions of the input drive voltage v(t)=Vmsin⁡(ωt)v(t) = V_m \sin(\omega t):

i1(t)=I0+I1sin⁡(ωt)+I2sin⁡(2ωt)+I3sin⁡(3ωt)+I4sin⁡(4ωt)+…i_1(t) = I_0 + I_1 \sin(\omega t) + I_2 \sin(2\omega t) + I_3 \sin(3\omega t) + I_4 \sin(4\omega t) + \dots

Because Device 2 is driven 180∘180^\circ (π radians\pi\text{ radians}) out of phase, its input is Vmsin⁡(ωt+π)=−Vmsin⁡(ωt)V_m \sin(\omega t + \pi) = -V_m \sin(\omega t). Substituting this phase shift into each harmonic term:

  • Fundamental: sin⁡(ωt+π)=−sin⁡(ωt)\sin(\omega t + \pi) = -\sin(\omega t)
  • Second harmonic: sin⁡(2(ωt+π))=sin⁡(2ωt+2π)=+sin⁡(2ωt)\sin(2(\omega t + \pi)) = \sin(2\omega t + 2\pi) = +\sin(2\omega t)
  • Third harmonic: sin⁡(3(ωt+π))=sin⁡(3ωt+3π)=−sin⁡(3ωt)\sin(3(\omega t + \pi)) = \sin(3\omega t + 3\pi) = -\sin(3\omega t)
  • Fourth harmonic: sin⁡(4(ωt+π))=sin⁡(4ωt+4π)=+sin⁡(4ωt)\sin(4(\omega t + \pi)) = \sin(4\omega t + 4\pi) = +\sin(4\omega t)

Thus, the current for Device 2 is:

i2(t)=I0−I1sin⁡(ωt)+I2sin⁡(2ωt)−I3sin⁡(3ωt)+I4sin⁡(4ωt)−…i_2(t) = I_0 - I_1 \sin(\omega t) + I_2 \sin(2\omega t) - I_3 \sin(3\omega t) + I_4 \sin(4\omega t) - \dots

In the center-tapped output transformer, the two currents flow in opposite directions through the primary winding halves toward the center tap. The net magnetic flux in the transformer core is proportional to the difference between the two currents (inet=i1−i2i_{\text{net}} = i_1 - i_2):

inet(t)=i1(t)−i2(t)=2I1sin⁡(ωt)+2I3sin⁡(3ωt)+2I5sin⁡(5ωt)+…i_{\text{net}}(t) = i_1(t) - i_2(t) = 2 I_1 \sin(\omega t) + 2 I_3 \sin(3\omega t) + 2 I_5 \sin(5\omega t) + \dots

Notice that:

  • Even harmonics (I2,I4,…I_2, I_4, \dots) cancel out completely! Because they are in phase in both halves of the primary winding, their opposing magnetic fluxes cancel in the ferrite core.
  • Odd harmonics (I1,I3,I5,…I_1, I_3, I_5, \dots) add constructively in phase, doubling the fundamental output current.
  • DC quiescent currents (I0I_0) flow in opposite directions through the primary, preventing DC magnetic saturation of the transformer core.

Ideal balance cancels even harmonics at the output. Real device, drive and transformer imbalances leave residual even-harmonic output, with rejection varying across frequency and operating level. Push-pull balance reduces the filtering burden, but output filtering and measurement are still required.

Virtual RF Ground and Power Supply Decoupling

With equal antiphase signals, the output winding's centre tap is a virtual RF ground at the fundamental. The two fundamental current components cancel in the supply lead. In-phase components, including even-harmonic currents, add there instead; imbalance also leaves residual RF. Supply bypassing and RF layout therefore remain necessary. A virtual ground neither fixes capacitor current ratings nor prevents supply ripple from modulating the output.

With an ideal transformer and sinusoidal collector/drain voltages, let Ve=VCC−VsatV_e=V_{CC}-V_{\text{sat}}. The full-winding differential voltage has peak 2Ve2V_e and peak-to-peak value 4Ve4V_e. Two devices provide approximately twice one device's power at the same individual voltage and current limits; doubling voltage alone does not establish four times the available power.


2. Solid-State Impedance Transformation and Transmission Line Transformers

Solid-state power transistors operate from low DC rail voltages (typically 13.8 V13.8\text{ V} in mobile equipment or 28 V28\text{ V} to 50 V50\text{ V} in base station amplifiers). Because power equals V2/2RV^2 / 2R, generating high RF power from a low supply voltage requires an extremely low load resistance.

Differential Voltage and Load Resistance

Let Ve=VCC−VsatV_e=V_{CC}-V_{\text{sat}} be the sinusoidal RF voltage peak at either collector/drain relative to the centre tap. A single-ended stage delivering power PSEP_{\text{SE}} requires:

RSE=Ve22PSER_{\text{SE}}=\frac{V_e^2}{2P_{\text{SE}}}

For a balanced push-pull stage, the differential RF peak is 2Ve2V_e. Using total output power PoutP_{\text{out}}:

RL(c−c)=(2Ve)22Pout=2Ve2PoutR_{L(c-c)}=\frac{(2V_e)^2}{2P_{\text{out}}}=\frac{2V_e^2}{P_{\text{out}}}

At the fundamental frequency, each device sees RL(c−c)/2R_{L(c-c)}/2. In Class B, the instantaneous load line of the conducting half-winding instead uses RL(c−c)/4R_{L(c-c)}/4, because its turns count is half the full winding. These are different current definitions; do not interchange them.

Numerical Demonstration of Low Impedance

Consider a standard 100 W100\text{ W} amateur transceiver operating from a 13.8 V13.8\text{ V} DC supply (Vsat≈1.3 VV_{\text{sat}} \approx 1.3\text{ V}, Veffective=12.5 VV_{\text{effective}} = 12.5\text{ V}):

RL(c−c)=2×(12.5 V)2100 W=2×156.25100=3.125 ΩR_{L(c-c)} = \frac{2 \times (12.5\text{ V})^2}{100\text{ W}} = \frac{2 \times 156.25}{100} = 3.125\ \Omega

Each transistor sees a fundamental-frequency load resistance of 3.125 Ω/2=1.56 Ω3.125\ \Omega/2=1.56\ \Omega. Transforming this extremely low impedance of 3.125 Ω3.125\ \Omega up to the standard 50.0 Ω50.0\ \Omega antenna load represents an impedance ratio of:

Ratio=50.0 Ω3.125 Ω=16:1\text{Ratio} = \frac{50.0\ \Omega}{3.125\ \Omega} = 16:1

Broadband Transmission Line Transformers (TLTs)

Conventional lumped-element LCLC matching networks cannot provide low-loss matching across the entire 1.8 MHz1.8\text{ MHz} to 30 MHz30\text{ MHz} HF spectrum without continuous retuning. Instead, solid-state amplifiers utilize Transmission Line Transformers (TLTs), pioneered by C.L. Guanella and Jerry Sevick.

TLTs consist of short lengths of low-characteristic-impedance transmission lines (such as miniature coaxial cables or twisted Teflon-insulated wire pairs) threaded through high-permeability binocular ferrite cores (e.g., Fair-Rite Type 43 or 61, both nickel-zinc ferrites):

  • Ferrite raises the impedance to unwanted common-mode currents, extending low-frequency operation.
  • Wanted differential-mode power travels along the transmission line rather than by core flux coupling. Core, conductor and dielectric losses still matter; line length, characteristic impedance and interconnection phase error limit high-frequency performance.

Combining equal transmission lines in suitable series/parallel arrangements gives common squared-integer impedance ratios. Here NN is the ideal voltage ratio; it need not represent turns around a core:

ZoutZin=N2=4:1,9:1,16:1,25:1\frac{Z_{\text{out}}}{Z_{\text{in}}} = N^2 = 4:1, \quad 9:1, \quad 16:1, \quad 25:1

In our 100 W100\text{ W} example, an ideal 16:116:1 impedance transformer has voltage ratio 4:14:1 and transforms 3.125 Ω3.125\ \Omega collector-to-collector to 50.0 Ω50.0\ \Omega. A practical design must verify loss, balance and matching over its intended bands.

Tip

The 50 V LDMOS Revolution: Modern solid-state amplifiers use laterally diffused MOSFETs (LDMOS) operating from VDD=50 VV_{DD} = 50\text{ V}. For a 1000 W1000\text{ W} amplifier (Veffective≈46 VV_{\text{effective}} \approx 46\text{ V}), the drain-to-drain load resistance is: RL(d−d)=2(46 V)21000 W=4.23 ΩR_{L(d-d)} = \frac{2(46\text{ V})^2}{1000\text{ W}} = 4.23\ \Omega A 9:19:1 transformer transforms this to 38.1 Ω38.1\ \Omega, which is easily matched to 50 Ω50\ \Omega with a broad, low-QQ network, drawing significantly less current than a 13.8 V13.8\text{ V} circuit and drastically reducing I2RI^2 R conductor losses.


3. Thermionic Valve (Tube) Grounded-Grid Linear Power Amplifiers

High-power amateur linear amplifiers delivering 500 W500\text{ W} to 1500 W1500\text{ W} PEP frequently utilize thermionic valves (such as the 3-500Z, 8877/3CX1500A7, or 4CX250B). In these amplifiers, the grounded-grid (cathode-driven) topology is the preeminent design.

Grounded-Grid Circuit Architecture

  • Control Grid: Bolted directly to the chassis ground (or bypassed to RF ground via low-inductance mica or ceramic disc capacitors).
  • Cathode / Filament: Heated by an AC filament transformer via a heavy bifilar RF cathode choke. The bifilar winding allows the low-voltage, high-current AC heater power to reach the filament while presenting a high RF impedance that prevents the RF input drive from being short-circuited to ground through the filament transformer.
  • RF Drive Injection: The exciter drives the cathode directly through an input matching network and DC blocking capacitor.
  • Plate (Anode): Operated at high positive DC potential (1500 V1500\text{ V} to 3500 V3500\text{ V}) through an RF plate choke, with output taken via a DC blocking capacitor into a tuned resonant tank.

Grounded-Grid Isolation and Stability

In a grounded-cathode amplifier, anode-to-grid capacitance couples output RF back to the input. It contributes to the Miller effect and can support oscillation when the circuit's feedback phase and loop gain permit. Neutralisation can cancel unwanted feedback; feedback capacitance does not make every grounded-cathode circuit oscillate.

In a grounded-grid amplifier, the grid's electrostatic shielding greatly reduces plate-to-cathode feedback. Properly constructed HF grounded-grid triode amplifiers normally need no neutralisation. Low-inductance grid grounding and suitable layout remain necessary, and parasitic oscillation must still be controlled.

Low Input Impedance and Feed-Through Power

  1. Input Impedance: Looking into the cathode of a grounded-grid stage, the dynamic input impedance is low:
Zin≈1gm+gk≈1gmZ_{\text{in}} \approx \frac{1}{g_m + g_k} \approx \frac{1}{g_m}

For power triodes with transconductance gmg_m between 10 mS10\text{ mS} and 20 mS20\text{ mS}, ZinZ_{\text{in}} ranges from 50 Ω50\ \Omega to 100 Ω100\ \Omega. This natural low impedance is an ideal match for standard 50 Ω50\ \Omega solid-state transceiver exciters.

  1. Feed-Through Power: In a grounded-grid circuit, the cathode-to-anode electron stream is in series with the input driving source. The RF drive voltage and plate voltage appear in series across the load. Therefore, part of the RF drive power feeds through and adds to the plate output power. Grid and input-circuit losses consume the rest. Denote the delivered part by PfeedP_{\text{feed}}:
Ptotal(output)=Pplate+PfeedP_{\text{total(output)}} = P_{\text{plate}} + P_{\text{feed}}

A typical grounded-grid stage exhibits a power gain of 10 dB10\text{ dB} to 13 dB13\text{ dB} (a power multiplication factor of 10 to 20), requiring approximately 60 W60\text{ W} to 100 W100\text{ W} of drive from a standard transceiver to achieve 1000 W1000\text{ W} to 1500 W1500\text{ W} PEP output.


4. Output Matching and Resonant Tank Circuits: Pi and Pi-L Networks

High-voltage valves operate at high plate voltages (Va=1500 VV_a = 1500\text{ V} to 3500 V3500\text{ V}) and moderate plate currents (Ia=0.4 AI_a = 0.4\text{ A} to 1.0 A1.0\text{ A}).

The Valve Plate Load Resistance

The equivalent RF plate load resistance (RaR_a) required by the tube for optimal power delivery in Class AB linear service is:

Ra≈VaK⋅IaR_a \approx \frac{V_a}{K \cdot I_a}

where KK is an empirical constant governed by the operating class (K≈1.8K \approx 1.8 to 2.02.0 for Class AB linear operation). For example, a valve operating at Va=2500 VV_a = 2500\text{ V} and Ia=0.50 AI_a = 0.50\text{ A} requires:

Ra=2500 V1.8×0.50 A≈2778 ΩR_a = \frac{2500\text{ V}}{1.8 \times 0.50\text{ A}} \approx 2778\ \Omega

The amplifier must transform this high resistance (2778 Ω2778\ \Omega) down to the standard 50.0 Ω50.0\ \Omega antenna load while filtering out harmonic emissions.

The Pi (π\pi) Network

The Pi network is the classical output matching network for valve amplifiers, consisting of three reactive components arranged in a "π\pi" configuration:

  • C1C_1 (Tune Capacitor): Shunt capacitance across the high-impedance valve plate.
  • LL (Tank Inductor): Series inductance connecting plate to load.
  • C2C_2 (Load Capacitor): Shunt capacitance across the low-impedance 50 Ω50\ \Omega output.

The Pi network acts as two back-to-back LL-networks matching through a virtual intermediate resistance (RvirtR_{\text{virt}}). It simultaneously acts as a third-order low-pass filter, providing harmonic suppression.

Choosing the Pi-Network Design Q

One traditional design convention uses the input-section Q:

QI=Ra∣XC1∣=Ra 2πfC1Q_I=\frac{R_a}{|X_{C1}|}=R_a\,2\pi fC_1

This input design parameter is not generally equal to the complete network's f0/bandwidthf_0/\text{bandwidth}. For the low-pass Pi circuit with Ra>RLR_a>R_L, choose:

Rv=Ra1+QI2<RL,QO=RLRv−1R_v=\frac{R_a}{1+Q_I^2}<R_L,\qquad Q_O=\sqrt{\frac{R_L}{R_v}-1}

Thus a nonzero output capacitance requires QI>Ra/RL−1Q_I>\sqrt{R_a/R_L-1}, rather than a universal minimum of 8. The reactance magnitudes are:

∣XC1∣=RaQI,∣XC2∣=RLQO,XL=Rv(QI+QO)|X_{C1}|=\frac{R_a}{Q_I},\quad |X_{C2}|=\frac{R_L}{Q_O},\quad X_L=R_v(Q_I+Q_O)

Increasing design Q generally improves harmonic filtering but increases reactive currents, loss and tuning sensitivity. With an ideal resistive output, IC2=QOIloadI_{C2}=Q_OI_{\text{load}} and IL=Iload1+QO2I_L=I_{\text{load}}\sqrt{1+Q_O^2}; the coil current is not generally QIIloadQ_II_{\text{load}}.

For coil series resistance RsR_s, its loss is IL,RMS2RsI_{L,\text{RMS}}^2R_s and unloaded coil Q is Qu=XL/RsQ_u=X_L/R_s. Estimate network efficiency from Pout/(Pout+Ploss)P_{\text{out}}/(P_{\text{out}}+P_{\text{loss}}), including capacitor and connection losses as relevant. Select Q for the required impedance ratio, filtering, bandwidth and component ratings; 10–12 is a possible design choice, not a universal optimum.

The Pi-L (π-L\pi\text{-}L) Network

For transmissions below 30 MHz, section 15 of the Australian amateur class licence requires spurious emissions to be attenuated below power within the necessary bandwidth by the lesser of 43+10log⁡10(pX)43+10\log_{10}(pX) dB and 50 dB, with pXpX in watts PEP. At or above 30 MHz, use the separate frequency-dependent limit. Required attenuation is not a universal 50 dB at every power and frequency. Verify the complete transmitter's emissions at the antenna transmission line.

The standard Pi-L network uses four reactive components: shunt C1C_1, series L1L_1, shunt C2C_2 and series L2L_2 before the load. It can be analysed as a Pi section followed by an L section, with the shared shunt capacitance divided between the two sections:

  • The Pi section transforms the high plate impedance (RaR_a) down to an intermediate virtual impedance (typically 200 Ω200\ \Omega to 300 Ω300\ \Omega).
  • The LL-section transforms the intermediate impedance down to the final 50 Ω50\ \Omega load.
  • Harmonic Rejection Advantage: The additional low-pass section can increase harmonic attenuation. Its actual response depends on component values and terminations; the emitted harmonic level also depends on the amplifier. Measure the final output and add filtering where required.

5. Architectural Comparison: Solid-State Push-Pull vs. Thermionic Grounded-Grid

FeatureSolid-State Push-Pull (LDMOS/BJT)Thermionic Grounded-Grid Triode
Operating Voltage (VDCV_{DC})Low (13.8 V−50 V13.8\text{ V} - 50\text{ V})Very High (1500 V−3500 V1500\text{ V} - 3500\text{ V})
Operating Current (IDCI_{DC})High to very high (20 A−45 A20\text{ A} - 45\text{ A})Low to moderate (0.4 A−1.0 A0.4\text{ A} - 1.0\text{ A})
Device Load Impedance (RLR_L)Extremely low (1.5 Ω−5 Ω1.5\ \Omega - 5\ \Omega)High (1500 Ω−3500 Ω1500\ \Omega - 3500\ \Omega)
Impedance Matching MethodBroadband Ferrite Transmission Line TransformersResonant Tuned Pi or Pi-L Tank Networks
Tuning RequirementsNo tuning required (instant broadband coverage)Requires manual or motorized "Tune" & "Load" adjustment per band
Second Harmonic SuppressionEven-harmonic cancellation depends on balance; output LPF still requiredDepends on the tuned output network and measured harmonic levels
Stability MeasuresProper layout, bias decoupling and input damping as requiredGrid shielding reduces feedback; low-inductance grounding and parasitic suppression remain necessary
SWR SensitivityMismatch can exceed device voltage/current limits; use protection and reduce driveMismatch can overheat valves or cause arcing; reduce drive and correct the load
Warm-up TimeInstantaneous (zero warm-up)Requires cathode warm-up (3 seconds3\text{ seconds} to 3 minutes3\text{ minutes})

6. Worked Engineering Examples

Worked Example 5.2.1: Solid-State Push-Pull Impedance and Transformer Design

An amateur designs a solid-state HF push-pull power amplifier using a pair of 50.0 V50.0\text{ V} LDMOS transistors to deliver Pout=600 WP_{\text{out}} = 600\text{ W} PEP. The saturation voltage of the transistors is Vsat=3.0 VV_{\text{sat}} = 3.0\text{ V}.

  1. Calculate the required collector-to-collector load resistance (RL(d−d)R_{L(d-d)}):
Veffective=VDD−Vsat=50.0 V−3.0 V=47.0 VV_{\text{effective}} = V_{DD} - V_{\text{sat}} = 50.0\text{ V} - 3.0\text{ V} = 47.0\text{ V} RL(d−d)=2⋅Veffective2Pout=2×(47.0 V)2600 W=2×2209600=4418600≈7.36 ΩR_{L(d-d)} = \frac{2 \cdot V_{\text{effective}}^2}{P_{\text{out}}} = \frac{2 \times (47.0\text{ V})^2}{600\text{ W}} = \frac{2 \times 2209}{600} = \frac{4418}{600} \approx 7.36\ \Omega

Each transistor sees a fundamental-frequency load resistance of 7.36 Ω/2=3.68 Ω7.36\ \Omega/2=3.68\ \Omega.

  1. Determine the nearest standard broadband TLT impedance ratio to match this 7.36 Ω7.36\ \Omega collector-to-collector impedance to a 50.0 Ω50.0\ \Omega antenna load:
Required Ratio=50.0 Ω7.36 Ω≈6.79:1\text{Required Ratio} = \frac{50.0\ \Omega}{7.36\ \Omega} \approx 6.79:1

A standard 9:19:1 transmission line transformer (ideal 3:13:1 voltage ratio) transforms 50.0 Ω50.0\ \Omega down to:

Rprimary=50.0 Ω9≈5.56 ΩR_{\text{primary}} = \frac{50.0\ \Omega}{9} \approx 5.56\ \Omega

The 9:19:1 transformer is a starting point: its 5.56 Ω5.56\ \Omega reflected load still differs from the required 7.36 Ω7.36\ \Omega. A matching network must transform this resistance and compensate device reactance. One shunt reactance alone cannot match two different real resistances; broadband operation requires a complete network design and verification.

Worked Example 5.2.2: Valve Pi-Network Component Reactance Calculations

A single-ended 3-500Z triode amplifier operates in Class AB with a plate voltage of Va=2600 VV_a = 2600\text{ V} and plate current of Ia=0.50 AI_a = 0.50\text{ A} at f=14.15 MHzf = 14.15\text{ MHz} (20-meter20\text{-meter} band). Use the input design convention QI=Ra/∣XC1∣=12.0Q_I=R_a/|X_{C1}|=12.0. Design the Pi matching network to match the valve plate down to RL=50.0 ΩR_L = 50.0\ \Omega.

  1. Calculate the valve plate load resistance (RaR_a) using K=1.8K = 1.8:
Ra=Va1.8⋅Ia=2600 V1.8×0.50 A=26000.90≈2889 ΩR_a = \frac{V_a}{1.8 \cdot I_a} = \frac{2600\text{ V}}{1.8 \times 0.50\text{ A}} = \frac{2600}{0.90} \approx 2889\ \Omega
  1. Calculate the required capacitive reactance (XC1X_{C1}) and capacitance of the plate tune capacitor (C1C_1):
XC1=RaQI=2889 Ω12.0≈240.8 ΩX_{C1} = \frac{R_a}{Q_I} = \frac{2889\ \Omega}{12.0} \approx 240.8\ \Omega C1=12πfXC1=12π×(14.15×106 Hz)×240.8 Ω≈46.7 pFC_1 = \frac{1}{2\pi f X_{C1}} = \frac{1}{2\pi \times (14.15 \times 10^6\text{ Hz}) \times 240.8\ \Omega} \approx 46.7\text{ pF}
  1. Calculate the virtual intermediate resistance (RvirtR_{\text{virt}}) and the required capacitive reactance (XC2X_{C2}) and capacitance of the load capacitor (C2C_2):
Rvirt=Ra1+QI2=2889 Ω1+144=2889145≈19.92 ΩR_{\text{virt}} = \frac{R_a}{1 + Q_I^2} = \frac{2889\ \Omega}{1 + 144} = \frac{2889}{145} \approx 19.92\ \Omega XC2=RL⋅RvirtRL−Rvirt=50.0×19.9250.0−19.92=50.0×19.9230.08=50.0×0.6622≈40.7 ΩX_{C2} = R_L \cdot \sqrt{\frac{R_{\text{virt}}}{R_L - R_{\text{virt}}}} = 50.0 \times \sqrt{\frac{19.92}{50.0 - 19.92}} = 50.0 \times \sqrt{\frac{19.92}{30.08}} = 50.0 \times \sqrt{0.6622} \approx 40.7\ \Omega C2=12πfXC2=12π×(14.15×106 Hz)×40.7 Ω≈276.4 pFC_2 = \frac{1}{2\pi f X_{C2}} = \frac{1}{2\pi \times (14.15 \times 10^6\text{ Hz}) \times 40.7\ \Omega} \approx 276.4\text{ pF}
  1. Calculate the output-section Q and series inductance. Use the series reactances of the equivalent L sections, not the sum of the shunt capacitor reactances:
QO=50.019.9234−1≈1.2287Q_O=\sqrt{\frac{50.0}{19.9234}-1}\approx1.2287 XL=Rvirt(QI+QO)=19.9234(12.0+1.2287)≈263.56 ΩX_L=R_{\text{virt}}(Q_I+Q_O)=19.9234(12.0+1.2287)\approx263.56\ \Omega L=263.56 Ω2π(14.15×106 Hz)≈2.964 μHL=\frac{263.56\ \Omega}{2\pi(14.15\times10^6\text{ Hz})}\approx2.964\ \mu\text{H}

The ideal design therefore uses about 46.7 pF46.7\text{ pF} input capacitance, 2.964 μH2.964\ \mu\text{H} series inductance and 276.4 pF276.4\text{ pF} output capacitance. At 14.15 MHz the unrounded values transform 50 Ω50\ \Omega to approximately 2889+j0 Ω2889+j0\ \Omega. The input capacitance includes valve and stray capacitance; real losses and component tolerances require adjustment.

Test Your Knowledge

What primary engineering advantage is achieved by configuring two RF power transistors in a balanced push-pull topology compared to a single-ended stage of identical total power rating?

A

Complete elimination of odd-order harmonics (3rd, 5th, and 7th)

B

Inherent cancellation of even-order harmonics (2nd, 4th, and 6th) in the output transformer

C

Quadrupled electrical power conversion efficiency from 50 percent to 100 percent

D

Direct 50-ohm output matching without requiring any impedance transformation

Test Your Knowledge

In a thermionic valve grounded-grid linear amplifier, why is neutralisation rarely required across the High Frequency (HF) amateur bands?

A

The plate circuit operates at zero RF voltage, preventing feedback current

B

The cathode is grounded directly to the chassis, short-circuiting all input signals

C

Negative feedback is introduced through an external capacitive bridge divider

D

The grounded control grid acts as an electrostatic Faraday shield between the plate and cathode

Test Your Knowledge

For a fixed impedance transformation, a Pi output network is redesigned with substantially higher design Q than necessary. Which trade-off should the designer expect?

A

Higher reactive currents and component loss, with a narrower useful tuning range

B

Insufficient harmonic attenuation, allowing strong 2nd and 3rd harmonics to exceed ACMA regulatory limits

C

Complete destruction of the antenna load due to high-voltage dielectric flashover across the loading capacitor

D

Reduction of the amplifier's input impedance to less than 1 ohm, causing severe exciter mismatch

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