4.3 Direct Digital Synthesis (DDS), SDR Architectures, and Digital Filter Topologies

4.3 Direct Digital Synthesis (DDS), SDR Architectures, and Digital Filter Topologies

Digital signal processing (DSP) and high-speed mixed-signal converters have revolutionized modern amateur radio transceiver design. In place of drift-prone analog LC tanks, varactor diodes, and crystal ladder filters, contemporary equipment employs Direct Digital Synthesis (DDS) for agile frequency generation, Software Defined Radio (SDR) front-ends for direct digitisation, and FIR/IIR digital filters operating via discrete convolution.

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Sampling, Quantisation and Conversion

An ADC samples voltage at times $nT_s$, where $T_s=1/f_s$, then assigns each sample an amplitude code. Sampling makes time discrete; quantisation gives a finite set of amplitude levels. An ideal 8-bit converter has 256 codes; over a 1 V input span its nominal step is $1/256=3.906\text{ mV}$. Rounding to the nearest level introduces quantisation error, rather than preserving every possible input voltage.

For ordinary real-valued baseband sampling, keep the highest signal frequency below the Nyquist frequency $f_s/2$. Thus 3.4 kHz audio needs a rate greater than 6.8 kS/s; 8 kS/s leaves some transition space for an analogue anti-alias filter. At 8 kS/s, an unwanted 6 kHz tone aliases to 2 kHz and cannot later be distinguished from an original 2 kHz input using those samples alone.

Analogue input --> anti-alias filter --> ADC --> digital processing
Digital output --> DAC --> reconstruction/anti-image filter --> analogue output

The input filter prevents unwanted frequencies from folding into the sampled band. The output filter suppresses DAC spectral images. More bits improve amplitude resolution; they do not replace an adequate sampling rate or filtering.

Direct Digital Synthesis (DDS) Architecture

A Direct Digital Synthesiser—or Numerically Controlled Oscillator (NCO)—synthesizes periodic waveforms mathematically by computing digital phase samples and converting them to analog voltages at a constant master clock rate $f_{\text{clk}}$.

           +-----------------+     +-----------------+     +---------+     +----------------+
f_clk ---->|  N-bit Phase    |====>|  Phase-to-Amp   |====>|  High-  |====>| Reconstruction |----> f_out
           |  Accumulator    |     |  LUT / CORDIC   |     | Spd DAC |     | Analog LPF     |
M (FTW) -->|  (overflow=f0)  |     |  (P-bit MSBs)   |     +---------+     +----------------+
           +-----------------+     +-----------------+

Functional Pipeline and Tuning Mathematics

1. Phase Accumulator ($N$ bits): Acts as an ideal digital integrator of frequency into phase. On each clock edge of $f_{\text{clk}}$, an $N$-bit register increments its content by an $N$-bit Frequency Tuning Word (FTW), denoted $M$: $\Phi[n] = (\Phi[n-1] + M) \pmod{2^N}$ Accumulator overflows establish the fundamental output frequency: $f_{\text{out}} = \frac{M \cdot f_{\text{clk}}}{2^N}$ The minimum frequency resolution ($\Delta f$, for $M = 1$) is: $\Delta f = \frac{f_{\text{clk}}}{2^N}$ For a 32-bit accumulator clocked at $100\text{ MHz}$, $\Delta f \approx 0.0233\text{ Hz}$, delivering sub-hertz tuning agility across the Nyquist bandwidth.
2. Phase-to-Amplitude Converter: Translates instantaneous phase values into sinusoidal amplitude words via a Read-Only Memory lookup table (LUT) or pipelined CORDIC algorithm.
3. Digital-to-Analog Converter (DAC): Converts discrete digital words into an analog staircase voltage waveform.
4. Reconstruction Low-Pass Filter: Suppresses DAC staircase sampling harmonics and Nyquist alias images ($f_{\text{image}} = f_{\text{clk}} - f_{\text{out}}$). Practical designs restrict $f_{\text{out}} \le 0.40 \cdot f_{\text{clk}}$ to ensure realizable analog filter cutoff skirts.
5. Phase Truncation Spurs: Passing only $P$ MSBs (e.g., 12 to 16 bits) to the sine LUT discards the $N - P$ least significant bits. This periodic truncation error modulates the carrier, generating discrete phase truncation spurs. DAC non-linearity also creates spurs. Spurious-Free Dynamic Range (SFDR) is the carrier-to-largest-spur ratio in the specified bandwidth; bit depth alone does not determine it.

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Software Defined Radio (SDR) Front-End Architectures

SDR architectures represent RF signals as complex analytic phasors using In-phase ($I$) and Quadrature ($Q$, $90^\circ$ offset) baseband components: $s(t) = I(t) + j Q(t) = A(t) e^{j\phi(t)}$ Because complex representation separates positive ($e^{+j\omega t}$) and negative ($e^{-j\omega t}$) frequencies, an SDR mathematically rejects image responses ($S_{\text{USB}} = I - \mathcal{H}\{Q\}$) without multi-pole analog IF crystal filters.

• Direct Conversion (Zero-IF / Low-IF): Translates RF directly to baseband using quadrature mixers. The Tayloe detector employs a 4-phase commutating switch clocked at $4 f_{\text{LO}}$ into four integrating capacitors ($0^\circ, 90^\circ, 180^\circ, 270^\circ$). The capacitor outputs are combined to obtain the in-phase and quadrature baseband signals. Conversion loss, noise and intermodulation performance depend on the implemented circuit.
• Direct RF Sampling: High-speed ADCs (e.g., 16-bit at $122.88\text{ MSPS}$) directly digitize the entire HF spectrum from the antenna. A Field-Programmable Gate Array (FPGA) Digital Down-Converter (DDC) applies digital quadrature mixing and decimation filtering, generating substantial processing gain: $\text{Processing Gain} = 10 \log_{10}\left( \frac{f_s}{2 B} \right)\text{ dB}$ For approximately white ADC noise, this filtering improves in-band SNR. It does not raise the ADC clipping level or remove distortion spurs.

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Digital Filtering: FIR vs. IIR Filter Topologies

Digital filtering in SDR transceivers is achieved through Finite Impulse Response (FIR) or Infinite Impulse Response (IIR) topologies.

Direct Form I, second-order IIR (a0 = 1)

Input delays:   x[n] -> [z^-1] -> x[n-1] -> [z^-1] -> x[n-2]
Output delays:  y[n] -> [z^-1] -> y[n-1] -> [z^-1] -> y[n-2]

Feedforward sum = b0*x[n] + b1*x[n-1] + b2*x[n-2]
Feedback sum    = -a1*y[n-1] - a2*y[n-2]
y[n]           = Feedforward sum + Feedback sum

Each z^-1 is one sample of delay. Both weighted sums feed the output.

Mathematical Difference Equations and z-Plane Stability

• FIR Filters (Non-Recursive): Output samples depend solely on present and past input samples: $y[n] = \sum_{k=0}^{M} b_k x[n-k]$ In the complex $z$-plane, all poles reside at origin $z = 0$. FIR filters with finite coefficients are stable. Real coefficients that are symmetric or antisymmetric about the impulse-response midpoint give linear phase (constant group delay). FIR filters need not have linear phase. Sharp transitions may require many taps, increasing computation and delay.
• IIR Filters (Recursive): Output samples incorporate feedback from prior output samples: $y[n] = \sum_{k=0}^{M} b_k x[n-k] - \sum_{k=1}^{N} a_k y[n-k] \quad \Longleftrightarrow \quad H(z) = \frac{\sum_{k=0}^{M} b_k z^{-k}}{1 + \sum_{k=1}^{N} a_k z^{-k}}$
• Realization Topologies: Direct Form I implements separate tapped delay lines for inputs and feedback outputs. Direct Form II is canonical, sharing a single tapped delay line of state variables, minimizing memory.
• $z$-Plane Stability: Under the bilinear transform, $z=(1+sT/2)/(1-sT/2)$, where $T$ is the sample period. It maps the left-half of the Laplace $s$-plane inside the $z$-plane unit circle. An IIR filter is bounded-input bounded-output (BIBO) stable if and only if all poles reside strictly inside the unit circle: $|z_p| < 1$ For this causal rational filter, poles on or outside the unit circle ($|z_p| \ge 1$) fail the BIBO stability condition; natural responses may persist or grow. Fixed-point coefficient quantization can shift pole positions toward the unit circle, causing arithmetic overflow and limit-cycle oscillations (persistent autonomous oscillations under zero input).
• Operational Trade-Offs: IIR filters can emulate classical analog filters (Butterworth, Chebyshev, elliptic), often meeting a magnitude-response specification with fewer coefficients than an FIR filter. Required order and delay depend on the specification. However, they exhibit non-linear phase (group delay dispersion), which can distort pulsed digital modulation waveforms.

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Linear Time-Invariant Systems and Discrete Convolution

The response $y[n]$ of any Linear Time-Invariant (LTI) system to an arbitrary input sequence $x[n]$ is computed by convolving $x[n]$ with the system's unit impulse response $h[n]$. For an FIR digital filter, the impulse response values $h[k]$ correspond directly to the filter tap coefficients $b_k$.

Definition and the Convolution Theorem

The continuous convolution integral and discrete convolution sum are: $y(t) = \int_{-\infty}^{\infty} x(\tau) h(t - \tau) \, d\tau \quad \Longleftrightarrow \quad y[n] = x[n] * h[n] = \sum_{k=-\infty}^{\infty} x[k] h[n - k]$

The Convolution Theorem dictates that time-domain convolution is equivalent to point-by-point multiplication in the frequency domain: $\mathcal{F}\{x[n] * h[n]\} = X(f) \cdot H(f)$ Convolving a digitized RF signal with an impulse response $h[n]$ shapes the spectrum by multiplying by $H(f)$, attenuating out-of-band noise while preserving passband signals.

Step-by-Step Graphical Convolution

Evaluating discrete convolution follows five consecutive operations:

1. Change of Variable: Express both sequences in terms of dummy summation index $k$, yielding $x[k]$ and $h[k]$.
2. Fold (Flip): Time-reverse the impulse response about the origin ($k = 0$) to form $h[-k]$.
3. Shift (Translate): Slide the flipped sequence along the $k$-axis by displacement $n$ to form $h[n - k]$.
4. Multiply: Compute the point-by-point product of overlapping samples $x[k] \cdot h[n - k]$.
5. Sum (Accumulate): Sum all products to obtain output sample $y[n]$. Increment $n$ and repeat.

       Graphical Representation of Discrete Convolution: y[n] = Σ x[k] h[n-k]

  Step 1: Express sequences in dummy index k:  x[k], h[k]
  Step 2: Fold (flip) impulse response:       h[k] -> h[-k]
  Step 3: Shift h[-k] by index n:             h[-k] -> h[n-k]
  
  Steps 4 & 5: Multiply overlapping samples and Sum products to compute y[n]
          At n = 1:
          x[k]:     ...   x[0]      x[1]      x[2]   ...
                           *         *
          h[1-k]:   ...   h[1]      h[0]       0     ...
                           |         |
          Products:    x[0]h[1] + x[1]h[0]  ===>  y[1] = Σ x[k] h[1-k]

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DFT and FFT: Time Samples to Frequency Bins

The discrete Fourier transform (DFT) represents $N$ samples by $N$ complex frequency-bin values:

$$X[k]=\sum_{n=0}^{N-1}x[n]e^{-j2\pi kn/N}.$$

Each bin describes amplitude and phase at $f_k=kf_s/N$, with bin spacing $\Delta f=f_s/N$. Bins above the positive Nyquist range represent negative frequencies for a real sampled waveform. An FFT is an efficient algorithm for the same DFT, not a different transform. The inverse transform reconstructs the sample sequence from its complex bins.

For $N=4$, $f_s=8\text{ kS/s}$ and $x=[1,0,-1,0]$:

Time samples x[n]             DFT magnitude |X[k]|
 +1  *                         2      *       *
  0  +---*---+---*--> n         0  *---+---*---+--> k
 -1          *                    0   1   2   3
     0   1   2   3

The result is $X=[0,2,0,2]$. Bins 1 and 3 correspond to +2 kHz and −2 kHz: the two-sided representation of the sampled cosine. The forward-transform convention above gives magnitudes 2; dividing by $N$ gives 0.5 in each conjugate bin. Real FFT displays may use other stated normalisations. A finite record that does not contain whole cycles spreads energy between bins; windowing reduces sidelobes at the cost of a wider main lobe.

Worked Engineering Calculations

Example 1: DDS Tuning Word, Resolution, and Nyquist Image

Problem: A DDS synthesiser uses a 32-bit phase accumulator ($N = 32$) clocked at $f_{\text{clk}} = 125.000\text{ MHz}$. Calculate the frequency resolution ($\Delta f$), the Tuning Word ($M$) for $f_{\text{out}} = 14.150000\text{ MHz}$, and the primary Nyquist alias image.

Solution:

1. Resolution: $\Delta f = \frac{f_{\text{clk}}}{2^N} = \frac{125 \times 10^6\text{ Hz}}{2^{32}} \approx 0.02910\text{ Hz}$.
2. Tuning Word ($M$): $M = \text{round}\left( \frac{14.150 \times 10^6 \times 2^{32}}{125 \times 10^6} \right) = 486,190,298$
3. Nyquist Image: $f_{\text{image}} = f_{\text{clk}} - f_{\text{out}} = 125.000\text{ MHz} - 14.150\text{ MHz} = 110.850\text{ MHz}$, readily attenuated by an analog low-pass reconstruction filter.

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Example 2: Discrete Convolution Sequence Evaluation

Problem: An input sequence $x[n] = \{2, 3, 1\}$ ($n = 0, 1, 2$) passes through an FIR filter with impulse response $h[n] = \{0.5, 0.25\}$ ($n = 0, 1$). Compute the output sequence $y[n] = x[n] * h[n]$ using the flip, shift, multiply, sum method.

Solution: Total output length is $L = 3 + 2 - 1 = 4$ samples ($n = 0, 1, 2, 3$):

1. $n = 0$: $y[0] = x[0]h[0] = 2 \times 0.5 = 1.0$
2. $n = 1$: $y[1] = x[0]h[1] + x[1]h[0] = (2 \times 0.25) + (3 \times 0.5) = 0.5 + 1.5 = 2.0$
3. $n = 2$: $y[2] = x[1]h[1] + x[2]h[0] = (3 \times 0.25) + (1 \times 0.5) = 0.75 + 0.5 = 1.25$
4. $n = 3$: $y[3] = x[2]h[1] = 1 \times 0.25 = 0.25$ Output sequence: $y[n] = \{1.0, 2.0, 1.25, 0.25\}$.

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Example 3: IIR Filter Difference Equation and Stability Check

Problem: A first-order recursive filter has difference equation $y[n] = 0.4 x[n] + 0.75 y[n-1]$. Determine its transfer function $H(z)$, pole location, stability, and steady-state DC gain.

Solution:

1. Transfer Function: Taking the $z$-transform yields $Y(z) = 0.4 X(z) + 0.75 z^{-1} Y(z)$: $H(z) = \frac{Y(z)}{X(z)} = \frac{0.4}{1 - 0.75 z^{-1}}$
2. Pole and Stability: The single pole is at $z_p = 0.75$. Because $|z_p| = 0.75 < 1$, the pole lies strictly inside the unit circle, confirming bounded-input bounded-output (BIBO) stability.
3. DC Gain: Setting $z = 1$: $H(1) = \frac{0.4}{1 - 0.75} = \frac{0.4}{0.25} = 1.60$