Free FE Electrical and Computer Exam Flashcards

Relates voltage, current, and resistance: V = IR. Power dissipated in a resistor: P = VI = I²R = V²/R.

KCL: the algebraic sum of currents entering a node equals zero (charge conservation). KVL: the algebraic sum of voltages around any closed loop equals zero (energy conservation).

Any linear two-terminal network reduces to a single voltage source V_TH (open-circuit voltage) in series with R_TH. R_TH is found by zeroing independent sources and looking into the terminals.

Any linear two-terminal network reduces to a current source I_N (short-circuit current) in parallel with R_N. Conversion: V_TH = I_N × R_N, and R_TH = R_N.

A resistive load receives maximum power when R_load = R_TH (the source's Thévenin resistance). At that match, efficiency is only 50%, with half the power lost in the source.

X_C = 1/(2πfC) = 1/(ωC). Reactance falls as frequency rises, so a capacitor approaches a short circuit at high frequency and an open circuit at DC.

X_L = 2πfL = ωL. Reactance rises with frequency, so an inductor approaches an open circuit at high frequency and a short circuit at DC.

τ = RC. The capacitor charges/discharges to ~63% of its change in one τ and is essentially complete (>99%) after about 5τ. For RL circuits, τ = L/R.

f₀ = 1/(2π√(LC)). At resonance X_L = X_C, so the reactances cancel and the impedance is purely resistive (minimum for series, maximum for parallel).

S = P + jQ, where P is real power (W), Q is reactive power (VAR), and |S| is apparent power (VA). Power factor pf = cos θ = P/|S|, where θ is the angle between voltage and current.

For a balanced load: P = √3 × V_L × I_L × cos θ, where V_L and I_L are line voltage and line current. This single relation holds for both wye and delta connections.

Wye: V_line = √3 × V_phase, I_line = I_phase. Delta: V_line = V_phase, I_line = √3 × I_phase. The √3 factor (≈1.732) is the key conversion.

V_p/V_s = N_p/N_s = I_s/I_p. Voltage scales with the turns ratio; current scales inversely. Impedance reflects by the square: Z_p = (N_p/N_s)² × Z_s.

Adding capacitance in parallel with an inductive load supplies reactive power locally, raising the power factor toward 1. This reduces line current and I²R losses for the same real power delivered.

N_s = 120f/P (rpm), where f is line frequency (Hz) and P is the number of poles. A 4-pole machine at 60 Hz spins at 1800 rpm synchronous speed.

With negative feedback: (1) no current flows into either input (infinite input impedance), and (2) the inputs are at the same voltage (virtual short). These two rules solve most op-amp circuits.

Inverting: A = −R_f/R_in. Non-inverting: A = 1 + R_f/R_in. The non-inverting configuration always has a gain magnitude of at least 1.

A diode conducts when forward-biased above its threshold (~0.7 V for silicon, ~0.3 V for germanium, ~1.8-3.3 V for LEDs) and blocks current when reverse-biased up to its breakdown voltage.

Cutoff: both junctions reverse-biased (off). Active: base-emitter forward, base-collector reverse (amplification, I_C = βI_B). Saturation: both junctions forward (switch fully on).

V_T = kT/q ≈ 26 mV at room temperature (~300 K). It appears in the diode equation I = I_S(e^(V/V_T) − 1) and in BJT small-signal transconductance g_m = I_C/V_T.

Half-wave passes one polarity, giving V_avg = V_peak/π. Full-wave (bridge or center-tapped) inverts the negative half, giving V_avg = 2V_peak/π and double the ripple frequency.

To reconstruct a signal without aliasing, sample at f_s > 2f_max (twice the highest frequency present). The minimum f_s = 2f_max is the Nyquist rate; f_s/2 is the Nyquist frequency.

When a signal is sampled below the Nyquist rate, frequencies above f_s/2 fold back and masquerade as lower frequencies. An anti-aliasing low-pass filter before sampling prevents this distortion.

H(s) = Y(s)/X(s) = output Laplace transform over input Laplace transform (zero initial conditions). Roots of the numerator are zeros; roots of the denominator are poles.

The output of a linear time-invariant system is y(t) = x(t) ∗ h(t), the convolution of the input with the impulse response. In the frequency domain this becomes simple multiplication: Y = X·H.

FIR (finite impulse response) uses only feed-forward terms, is always stable, and can have exactly linear phase. IIR uses feedback, achieves sharper rolloff with fewer taps, but can become unstable.

Power ratio: dB = 10·log₁₀(P₂/P₁). Voltage (or current) ratio: dB = 20·log₁₀(V₂/V₁). A 3 dB increase is roughly double the power; 6 dB is roughly double the voltage.

Four laws unifying electromagnetics: Gauss's law (electric flux from charge), Gauss's law for magnetism (no magnetic monopoles), Faraday's law (changing B induces E), and Ampère-Maxwell (current and changing E produce B).

c = 3×10⁸ m/s in free space, with c = λf. So wavelength λ = c/f; a 1 GHz wave has λ ≈ 0.3 m. In a medium, velocity = c/√(εᵣμᵣ).

Z₀ = √(L/C) for a lossless line. Matching the load to Z₀ eliminates reflections. The reflection coefficient is Γ = (Z_L − Z₀)/(Z_L + Z₀).

η₀ = √(μ₀/ε₀) ≈ 377 Ω (often approximated as 120π Ω). It relates the electric and magnetic field magnitudes of a plane wave: E/H = η.

NOT(A AND B) = (NOT A) OR (NOT B); NOT(A OR B) = (NOT A) AND (NOT B). In symbols: (AB)' = A' + B' and (A + B)' = A'B'. They let you convert between AND/OR forms.

Combinational logic output depends only on current inputs (gates, MUX, adder, decoder). Sequential logic depends on inputs and stored state, using memory elements (flip-flops) and typically a clock.

On the active clock edge, the D flip-flop copies its D input to output Q (Q⁺ = D). It stores one bit and is the basic building block of registers and counters.

A K-map is a grid arranged in Gray-code order that visually groups adjacent 1s (in powers of 2) to minimize a Boolean expression, reducing the number of gates needed in the implementation.

The standard way to store signed integers: negate by inverting all bits and adding 1. An n-bit two's complement range is −2^(n−1) to 2^(n−1) − 1, with a single representation for zero.

Setup time: the data input must be stable before the clock edge. Hold time: the data must remain stable after the edge. Violating either can cause metastability and unpredictable output.

Seven layers, bottom to top: Physical, Data Link, Network, Transport, Session, Presentation, Application. The Network layer (IP) handles routing; the Transport layer (TCP/UDP) handles end-to-end delivery.

TCP is connection-oriented, reliable, and ordered with acknowledgments and retransmission (web, email, file transfer). UDP is connectionless, fast, and best-effort with no guaranteed delivery (streaming, DNS, VoIP).

A /24 mask (255.255.255.0) reserves 24 bits for the network and 8 for hosts, giving 2^8 − 2 = 254 usable addresses (network and broadcast addresses are reserved).

C = B·log₂(1 + S/N) bits per second, where B is bandwidth (Hz) and S/N is the signal-to-noise power ratio (linear, not dB). It sets the theoretical maximum error-free data rate.

For forward gain G and feedback H: T(s) = G/(1 + GH). The characteristic equation 1 + GH = 0 determines the closed-loop poles and therefore system stability.

Gain margin: extra gain (dB) allowed before instability, read where phase = −180°. Phase margin: extra phase lag allowed before instability, read where gain = 0 dB. Positive margins indicate a stable system.

ζ < 1 is underdamped (oscillatory), ζ = 1 is critically damped (fastest with no overshoot), ζ > 1 is overdamped (slow, no overshoot). Percent overshoot depends only on ζ.

Proportional reacts to present error, Integral eliminates steady-state error by accumulating past error, and Derivative anticipates future error to add damping and reduce overshoot.

Differentiation: L{f'(t)} = sF(s) − f(0). Integration: L{∫f(t)dt} = F(s)/s. These turn differential equations into algebraic equations in s.

Mean μ = E[X] = Σ x·P(x). Variance σ² = E[(X − μ)²] = E[X²] − μ². The standard deviation σ = √(variance) measures spread about the mean.

Describes how an algorithm's time or space grows with input size n in the worst case. Common orders, fastest to slowest: O(1), O(log n), O(n), O(n log n), O(n²), O(2ⁿ).

Future worth: F = P(1 + i)ⁿ. Present worth: P = F/(1 + i)ⁿ, where i is the interest rate per period and n is the number of periods. These (P/F) factors discount cash flows over time.

Under the NCEES Model Rules, engineers must hold paramount the safety, health, and welfare of the public. This duty overrides obligations to clients or employers and is the foundation of professional ethics.