Section 2.1: Digital Logic Gates & Truth Tables

2.1 Digital Logic Gates & Truth Tables

Digital electronics form the foundation of modern automated systems, including the mail sorting machinery, scanning devices, and computerized control systems used throughout the United States Postal Service (USPS). Unlike analog systems that process continuous signals, digital systems process discrete information represented in binary form. This section explores the fundamental concepts of digital logic, logic gates, truth tables, Boolean algebra, and the practical application of active-high and active-low signaling.

Logic Levels and Noise Margins

In digital systems, binary states are represented by voltage ranges known as logic levels. Typically, a logic '0' represents low voltage (often ground or 0V), and a logic '1' represents high voltage (typically +5V in Transistor-Transistor Logic, or TTL, systems, and +3.3V or +5V in Complementary Metal-Oxide-Semiconductor, or CMOS, systems).

Because electrical noise is inevitable in industrial environments, logic devices define strict input and output voltage thresholds. These thresholds ensure that minor fluctuations do not corrupt the signals.

• V_OH (Output High Voltage): The minimum voltage the gate outputs for a logic 1.
• V_OL (Output Low Voltage): The maximum voltage the gate outputs for a logic 0.
• V_IH (Input High Voltage): The minimum voltage the input will recognize as a logic 1.
• V_IL (Input Low Voltage): The maximum voltage the input will recognize as a logic 0.

The difference between these values defines the noise margin. For example, the high-level noise margin is calculated as V_NMH = V_OH - V_IH. If a noise spike exceeds this margin, a logic 1 could be misread as a logic 0, causing control errors in sorting machine sensors.

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Fundamental Logic Gates

A logic gate is an electronic circuit that performs a specific logical operation on one or more binary inputs to produce a single binary output. The three primary logic gates are the AND, OR, and NOT gates.

1. AND Gate

An AND gate requires all of its inputs to be logic 1 for the output to be logic 1. If any input is 0, the output is 0. In Boolean notation, the AND operation is represented by a dot (·) or by writing the variables adjacent to each other.

• Boolean Expression: Y = A · B (or simply Y = AB)

2. OR Gate

An OR gate produces a logic 1 output if at least one of its inputs is logic 1. The output is 0 only when all inputs are 0. In Boolean notation, the OR operation is represented by a plus sign (+).

• Boolean Expression: Y = A + B

3. NOT Gate (Inverter)

A NOT gate, commonly called an inverter, has a single input and inverts its state. If the input is 1, the output is 0; if the input is 0, the output is 1. In Boolean notation, the NOT operation is represented by an apostrophe or bar.

• Boolean Expression: Y = A' (or Y = NOT A)

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Secondary and Universal Logic Gates

By combining primary gates, we construct secondary gates: NAND, NOR, XOR, and XNOR. NAND and NOR gates are particularly significant because they are universal gates, meaning any digital circuit can be built using only NAND or only NOR gates. This simplifies manufacturing and troubleshooting of control boards.

1. NAND Gate

The NAND gate (Not-AND) is an AND gate followed by an inverter. The output is logic 0 only when all inputs are logic 1.

• Boolean Expression: Y = (A · B)'

2. NOR Gate

The NOR gate (Not-OR) is an OR gate followed by an inverter. The output is logic 1 only when all inputs are logic 0.

• Boolean Expression: Y = (A + B)'

3. XOR Gate (Exclusive OR)

The XOR gate (exclusive OR) produces a logic 1 output if the inputs are different. If both inputs are 0 or both inputs are 1, the output is 0. XOR gates are widely used in binary addition circuits and parity generators.

• Boolean Expression: Y = A ⊕ B = A · B' + A' · B

4. XNOR Gate (Exclusive NOR)

The XNOR gate (exclusive NOR) is the inverse of the XOR gate. It produces a logic 1 output only when the inputs are identical (both 0 or both 1).

• Boolean Expression: Y = (A ⊕ B)' = A · B + A' · B'

Combined Truth Table

The following truth table summarizes the outputs of all basic logic gates for all possible input combinations of two variables, A and B:

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Boolean Algebra Laws

Boolean algebra is the mathematical framework used to analyze and simplify digital circuits. Just as standard algebra uses operations like addition and multiplication, Boolean algebra uses logical operations (AND, OR, NOT). Simplifying expressions reduces the physical gate count, which minimizes cost, power consumption, and propagation delay (the time it takes for a change in input to change the output).

Key Boolean laws include:

• Identity Laws: A + 0 = A and A · 1 = A
• Null (Annihilation) Laws: A + 1 = 1 and A · 0 = 0
• Idempotent Laws: A + A = A and A · A = A
• Complement Laws: A + A' = 1 and A · A' = 0
• Double Negation: (A')' = A
• Distributive Law: A · (B + C) = (A · B) + (A · C) and A + (B · C) = (A + B) · (A + C)

De Morgan's Theorem

De Morgan's theorem provides a mathematical method for resolving inverted group terms, making it essential for converting logic circuits between NAND/NOR configurations.

1. Theorem 1: The complement of a sum is equal to the product of the individual complements. (A + B)' = A' · B' Schematic Equivalent: A NOR gate is equivalent to an AND gate with inverted inputs (sometimes called a bubbled AND gate).
2. Theorem 2: The complement of a product is equal to the sum of the individual complements. (A · B)' = A' + B' Schematic Equivalent: A NAND gate is equivalent to an OR gate with inverted inputs (sometimes called a bubbled OR gate).

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Active-High vs. Active-Low Signals

When analyzing digital schematics, you will encounter two types of signaling conventions: active-high and active-low.

• Active-High: The signal performs its designated function when it is at a logic 1 state (high voltage). For example, an active-high ENABLE signal starts a motor when it transitions from 0 to 1.
• Active-Low: The signal performs its designated function when it is at a logic 0 state (low voltage/ground). Active-low signals are designated in text by a bar over the name, a prefix tilde (~RESET), or a slash (/RESET). In schematics, active-low pins are identified by a small circle, or logic bubble, at the pin input. A RESET pin with a bubble requires a 0V signal to reset the system; under normal running conditions, it must be kept high (+5V).

Why Use Active-Low?

Active-low signaling is common in industrial systems for several reasons:

1. Improved Safety and Noise Immunity: In many systems, ground (0V) is a more stable reference than Vcc (+5V). Under a fault condition (like a broken wire), a line will typically fall to 0V. If critical signals (like ESTOP or RESET) are active-low, a severed wire naturally triggers the safe shutdown state rather than leaving the system in an uncontrolled running state.
2. Wired-AND/Wired-OR Capability: Multiple open-collector or open-drain outputs can share a single line with a pull-up resistor. Any device can pull the line low to signal an interrupt or busy state, which is impossible with active-high push-pull outputs without causing a short circuit.
3. Pull-Up and Pull-Down Resistors: Because floating (unconnected) inputs on digital chips can drift randomly due to ambient electromagnetic noise, they must be tied to a default logic level. A pull-up resistor connects the pin to Vcc, ensuring a default logic 1. A pull-down resistor connects the pin to ground, ensuring a default logic 0. When an external switch closes, it overrides the resistor to assert the opposite state.