10.1 DC Voltage and Current Multipliers
Key Takeaways
- For crystalline-silicon PV modules in UK installations, UDC-MAX = UOC_STC × 1.2; UOC_STC and VOC_STC are the same datasheet open-circuit voltage
- IDC-MAX = ISC_STC × 1.25, or equivalently ISC_MOD × 1.25; this is the design maximum current of one string
- Maximum DC voltage for M modules in series is M × UDC-MAX; maximum DC current with N parallel strings is IDC-MAX × (N − 1)
- Where DC power optimisers are used, take the manufacturer maximum voltage and current without applying the 1.2 and 1.25 STC multipliers
- Thin-film modules can produce extra voltage and current during initial soak-in, so STC × 1.2 / 1.25 is not automatically enough
Quick Answer: For PV systems installed in the UK using modules with crystalline silicon cells, apply UDC-MAX = UOC_STC × 1.2 and IDC-MAX = ISC_STC × 1.25 (ISC_MOD is the same current). UOC_STC and VOC_STC are interchangeable names for the datasheet open-circuit voltage. Rate every DC part for M × UDC-MAX (modules in series) and IDC-MAX × (N − 1) (parallel strings). Where optimisers are used, take maximum DC voltage and current without those STC multipliers. Thin-film modules may show increased voltage and current during initial soak-in.
Why STC is not the rating point
Standard Test Conditions (STC) lock a module at 1000 W/m², 25 °C cell temperature and air mass 1.5. That is a laboratory snapshot, not a UK roof in January. Every DC component — module connectors, string cable, DC isolator, combiner, surge protective device and inverter DC input — must remain within its voltage and current rating at the worst credible operating point, not at the bold STC figures on the label. Learning outcome 4.2.1 in City & Guilds 2922-34 handbook v1.3 therefore applies a pair of simple multipliers to crystalline-silicon STC values, then series and parallel arithmetic, before any device is selected.
If you size a connector from 10 × 41.0 V = 410 V and the true cold-weather string voltage is 492 V, you have understated the design voltage by 82 V. A 450 V-rated part that looked comfortable on raw STC would then be specified below the voltage the array can actually produce. The multipliers exist so that understatement does not reach the isolator, the cable insulation or the inverter DC window.
Datasheet symbols you must treat as equivalent
Manufacturers print Voc and Isc. The IET Code of Practice for Grid Connected Solar Photovoltaic Systems and the handbook often print Uoc and Isc. On the paper they are the same quantities:
- UOC_STC or VOC_STC — module open-circuit voltage at STC. Interchangeable. This is the voltage with the module terminals open, so no current is drawn and the voltage is at its highest for that temperature and irradiance.
- ISC_STC or ISC_MOD — module short-circuit current at STC. Interchangeable. A series string still carries this module current; series connection adds voltage, not current.
- M — number of modules connected in series in one string.
- N — number of strings connected in parallel in the array or sub-array (section 10.2 writes the same count as NS).
The two crystalline-silicon multipliers
For PV systems installed in the UK using modules with crystalline silicon cells, apply to the STC parameters:
UDC-MAX = UOC_STC × 1.2
IDC-MAX = ISC_STC × 1.25 (or ISC_MOD × 1.25 — same current)
UDC-MAX is the design maximum voltage of one module. IDC-MAX is the design maximum current of one string. You do not apply 1.2 to current, and you do not apply 1.25 to voltage. Mixing the factors is a standard way to fail a calculation question even when the arithmetic is otherwise neat.
Why Voc is worst in the cold
A crystalline-silicon cell is a photodiode. Open-circuit voltage has a negative temperature coefficient, typically about −0.30 %/°C to −0.36 %/°C. STC freezes the cell at 25 °C. On a clear winter morning a UK roof-mounted module can sit far below that — 0 °C, −5 °C, occasionally lower. Voltage rises as temperature falls.
Work the temperature idea with a round coefficient so the direction is obvious. Take −0.33 %/°C and a drop from 25 °C to −10 °C:
Temperature change = 25 − (−10) = 35 °C cooler than STC.
Fractional Voc rise ≈ 35 × 0.33 = 11.55 %, so Voc ≈ 1.1155 × VOC_STC from temperature alone.
The handbook does not ask you to look up γVoc and run a full temperature formula in the knowledge-test arithmetic. It gives a single 1.2 factor (a 20 % uplift on UOC_STC). That 20 % covers the cold-weather Voc rise plus a remainder for module voltage tolerance and measurement uncertainty used in UK Code of Practice design. Irradiance moves Voc only weakly; the dominant Voc worst case is cold and bright, not hot. Hot cells reduce Voc, which is why inverter start-up on a baking roof can look low while the dangerous voltage for insulation and isolators is the winter open-circuit figure.
Why 1.25 exists on current
Short-circuit current scales almost linearly with irradiance. STC is 1000 W/m². Cloud-edge enhancement, snow or light-coloured ground albedo, and low air mass can push irradiance above 1000 W/m², so Isc can exceed ISC_STC. Modules also carry a positive current tolerance (often in the +3 % to +5 % band). The 1.25 current multiplier used in UK CoP practice is a bundled margin for irradiance above STC, that tolerance, and measurement. It matches the long-standing IEC / BS 7671 Section 712 treatment of PV current.
It is not a Voc-style cold-weather factor. Isc has a small positive temperature coefficient, so hot cells make slightly more current, but you still apply 1.25 to ISC_STC rather than inventing a separate hot-weather current formula unless the manufacturer publishes one.
Series voltage and parallel current
All parts of the DC system are rated for the array maximum, taking series and parallel connection into account:
Maximum DC voltage = M × UDC-MAX
Maximum DC current = IDC-MAX × (N − 1)
Series: voltages add. Ten modules in one string means ten lots of UDC-MAX. That product is the lowest voltage rating you may accept on the DC isolator, connectors, cable insulation, SPD and inverter DC input for that string.
Parallel: the current that can be forced backwards through one string (or into a faulted module) comes from the other strings, so you count N − 1, not N. Two strings cannot reverse-feed more than one string’s current into a third string that does not exist. That (N − 1) figure is the reverse-current the string cable, connectors and modules must withstand unless string overcurrent protection (section 10.2) cuts it off.
Do not confuse reverse-current with the current in the combined array cable after healthy strings have been paralleled, which is N × IDC-MAX in normal generation. The handbook rating rule for modules connected in parallel is the (N − 1) reverse-current expression — that is the figure that overheats a faulted string.
Worked example — VOC_STC 41.0 V, ISC_STC 13.8 A, 10 series, 2 parallel
Crystalline silicon, no optimisers.
Step 1 — one-module maxima
UDC-MAX = 41.0 × 1.2
41.0 × 1.0 = 41.0
41.0 × 0.2 = 8.2
41.0 + 8.2 = 49.2 V
IDC-MAX = 13.8 × 1.25
13.8 × 1 = 13.8
13.8 × 0.25 = 3.45
13.8 + 3.45 = 17.25 A
Check: 13.8 × 5 / 4 = 69.0 / 4 = 17.25 A.
Step 2 — string Voc design (series)
Maximum DC voltage = M × UDC-MAX = 10 × 49.2
10 × 49 = 490
10 × 0.2 = 2
490 + 2 = 492 V
Raw STC stack would have been 10 × 41.0 = 410 V. The multiplier adds 492 − 410 = 82 V. Any DC part rated at 400 V or 450 V is below 492 V and is not acceptable for this string.
Step 3 — array current using (N − 1)
N = 2, so N − 1 = 1
Maximum DC current = 17.25 × (2 − 1) = 17.25 × 1 = 17.25 A
With only two strings, one healthy string is the only parallel source that can reverse-feed a faulted string. That is why two-string arrays so often need no string fuse (section 10.2): 17.25 A is typically still below the module reverse-current rating.
If the same modules were built as three parallel strings, reverse current would become 17.25 × (3 − 1) = 17.25 × 2. 17 × 2 = 34 and 0.25 × 2 = 0.50, so 34.50 A.
Optimisers: maxima without the STC multipliers
Where DC power optimisers (module-level power electronics) are used, take the maximum DC voltage and current without the 1.2 and 1.25 multipliers on module STC. The optimiser output is a controlled DC port. Its maximum voltage and maximum current are stated by the optimiser manufacturer and are already the design maxima for the optimiser-to-inverter DC circuit. Applying 1.2 × module Voc on top of a clamped optimiser output invents a voltage the hardware cannot produce and mis-sizes isolators and inverter windows.
Read the optimiser datasheet for the long DC route and the inverter. Do not stack crystalline-silicon STC multipliers onto a controlled output that the manufacturer has already capped.
Thin-film soak-in
Thin-film modules (amorphous silicon and some multi-junction thin films) can exhibit increased voltage and current during initial soak-in — the first hours to weeks of light exposure — before they settle toward the nameplate STC figures. The crystalline-silicon 1.2 / 1.25 pair is not a substitute for the thin-film manufacturer’s soak-in factors. If the datasheet states a higher initial Voc or Isc, rate the DC system to those inflated values (and still consider temperature). Protection and insulation must survive the higher initial period, not just year-two nameplate.
When multipliers apply, when they do not
| Situation | Voltage used for DC ratings | Current used for DC ratings | Notes |
|---|---|---|---|
| Crystalline silicon, no optimiser | M × (UOC_STC × 1.2) | IDC-MAX × (N − 1), with IDC-MAX = ISC_STC × 1.25 | Default UK handbook method |
| DC power optimisers used | Manufacturer maximum voltage without × 1.2 on STC Voc | Manufacturer maximum current without × 1.25 on STC Isc | Do not stack multipliers on a clamped output |
| Thin-film, including a-Si | Manufacturer soak-in Voc (may exceed UOC_STC × 1.2) | Manufacturer soak-in Isc (may exceed ISC_STC × 1.25) | Initial light-soak can raise both V and I |
| Cell technology not confirmed | Do not assume 1.2 | Do not assume 1.25 | Read the datasheet cell type first |
Keep the cold-weather Voc story and the 1.2 / 1.25 pair together: voltage is a winter problem; current is an irradiance-and-tolerance problem. Then apply series for voltage and (N − 1) for reverse current before you touch an isolator catalogue.
For PV systems installed in the UK using crystalline-silicon modules, what is UDC-MAX in terms of the STC open-circuit voltage?
A crystalline-silicon module has VOC_STC = 41.0 V. Ten modules are connected in series and no optimisers are used. What is the design maximum DC voltage of the string?
Two strings are connected in parallel. Each module has ISC_STC = 13.8 A. Using the crystalline-silicon current multiplier and the (N − 1) parallel rule, what is the maximum DC current for rating the parallel-connected parts?