15.1 Hardware Components and the Fetch–Decode–Execute Cycle
Key Takeaways
- The CPU contains the control unit, which directs operations; the arithmetic logic unit (ALU), which computes; and registers, which hold data and addresses being used right now.
- Fetch: the address in the program counter is used to read the next instruction from memory into the instruction register, and the program counter advances.
- Decode: the control unit interprets the instruction's operation code and operands; execute: the operation is carried out and results are stored, then the cycle repeats.
- RAM is volatile main memory for running programs and data; storage such as SSDs and hard drives is nonvolatile and keeps data when power is off.
- Faster memory is smaller and costlier per byte: registers, then cache, then RAM, then SSD, then hard disk.
What this competency asks
Two competencies in Category V cover hardware:
- Operating systems control and coordinate hardware and software. The first skill listed is to identify hardware components and their functions (software and operating-system tasks are in Section 15.2).
- Be familiar with the steps required to execute a computer program (fetch-decode-execute cycles): describe what happens during fetch, decode, and execute, including the order of the steps.
Hardware components and their functions
| Component | Function |
|---|---|
| CPU (central processing unit) | Executes program instructions |
| — Control unit (CU) | Fetches and decodes instructions; directs other components with control signals |
| — Arithmetic logic unit (ALU) | Performs arithmetic (add, subtract) and logic (AND, OR, comparisons) |
| — Registers | Tiny, very fast storage inside the CPU for the values in immediate use |
| — Cache | Small, fast memory on or near the CPU holding recently used data and instructions |
| RAM (main memory) | Holds running programs and their data; volatile, so its contents are lost when power is off |
| ROM / firmware | Nonvolatile memory holding startup code (BIOS/UEFI) |
| Secondary storage: SSD, hard disk (HDD) | Nonvolatile, long-term storage for files and programs |
| Motherboard and buses | Connect the components; the address, data, and control buses carry signals |
| GPU (graphics processing unit) | Many simple cores for graphics and parallel computation |
| Input devices | Keyboard, mouse, touchscreen, microphone, camera, sensors |
| Output devices | Display, speakers, printer, actuators |
| Network interface | Connects to wired or wireless networks |
| Power supply | Converts and delivers electrical power |
The stored-program idea
In the von Neumann architecture, described in 1945, program instructions and data are both stored as binary in the same memory. The CPU reads instructions from memory just as it reads data. This makes computers general-purpose: loading a different program makes the same hardware do a different job. Because instructions and data share one path to memory, the CPU can wait on memory transfers, a limit known as the von Neumann bottleneck. Caches help reduce it.
Key CPU registers
| Register | Holds |
|---|---|
| Program counter (PC) | The address of the next instruction |
| Instruction register (IR) | The instruction currently being decoded or executed |
| Memory address register (MAR) | The address being read or written |
| Memory data register (MDR) | The data just read, or about to be written |
| Accumulator / general-purpose registers | Operands and results of ALU operations |
The fetch–decode–execute cycle
The CPU repeats three steps for every instruction, billions of times per second.
- Fetch
- Copy the PC's address into the MAR.
- Read the instruction at that address from memory into the MDR, then copy it into the IR.
- Increment the PC so it points to the next instruction.
- Decode
- The control unit interprets the instruction: its operation code (for example ADD, LOAD, STORE, or JUMP) and its operands (registers, a value, or a memory address).
- It sets up the signals and paths needed to carry out the operation.
- Execute
- Carry out the operation: the ALU computes, data move between memory and registers, or, for a jump or branch, a new address is written into the PC.
- Store the result (some descriptions list this as a fourth store or write-back step).
- Repeat with the instruction the PC now points to.
Order matters: fetch, then decode, then execute. A jump works by changing the PC during execute, so the next fetch comes from the new address. That is how loops and if statements are carried out at the hardware level.
Clock speed (in GHz) sets how many cycles per second the processor runs. Real performance also depends on how many instructions complete per cycle, on caches, and on the number of cores, which are independent processing units that can run instructions in parallel. Pipelining overlaps the fetch, decode, and execute stages of consecutive instructions, like an assembly line.
Memory hierarchy
| Level | Typical size | Speed | Volatile? |
|---|---|---|---|
| Registers | Bytes | Fastest | Yes |
| Cache (L1, L2, L3) | KB to tens of MB | Very fast | Yes |
| RAM | GB | Fast | Yes |
| SSD (flash) | Hundreds of GB to TB | Much slower than RAM | No |
| Hard disk (magnetic) | TB | Slower still, with mechanical delay | No |
Faster memory costs more per byte, so computers use small amounts of fast memory and large amounts of slow memory. Caches exploit locality: programs tend to reuse recent data (temporal locality) and access nearby addresses (spatial locality).
Addressable memory
An address bus with n lines can name 2ⁿ addresses. With byte addressing, a 32-bit address space reaches 2³² bytes = 4 GiB, which is why 32-bit systems cannot directly address more than 4 GB of RAM.
Resource issues that affect functionality
Too little RAM forces the operating system to move data to and from storage constantly, which makes the computer slow. A full disk prevents saving files and updates. An overheating CPU slows itself down. Insufficient bandwidth stalls network applications. Section 15.2 connects these hardware limits to operating-system management.
In what order does a CPU carry out the basic steps for each instruction?
During the fetch step, which sequence occurs?
A processor uses byte-addressable memory and a 32-bit address. What is the maximum amount of memory it can address directly?
A student saves an essay only in RAM and the computer loses power. What happens, and why?