14.1 PLC Hardware Architecture, Sinking/Sourcing I/O & Scan Cycle Operation

14.1 PLC Hardware Architecture, Sinking/Sourcing I/O & Scan Cycle Operation

In modern Canadian industrial facilities—such as automated manufacturing plants, sawmills, petrochemical refineries, mining concentrators, and water treatment operations—the Programmable Logic Controller (PLC) and Programmable Automation Controller (PAC) serve as the primary control engines. Industrial electricians must possess a rigorous understanding of PLC hardware organization, discrete and analog input/output (I/O) interfacing, sinking and sourcing direct current (DC) circuits, and the timing mechanics of the PLC operating scan cycle.

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1. Modular PLC Hardware Architecture

An industrial PLC is a specialized, ruggedized solid-state computer designed to survive harsh industrial environments characterized by electrical noise, wide temperature swings, mechanical vibration, and airborne moisture. Modular PLC systems consist of five core hardware assemblies mounted within an equipment rack or chassis:

   ┌─────────────────────────────────────────────────────────────────────────┐
   │                       MODULAR PLC CHASSIS / RACK                        │
   ├──────────────┬──────────────┬──────────────┬──────────────┬─────────────┤
   │ POWER SUPPLY │   CPU UNIT   │  DISCRETE IN │ DISCRETE OUT │  ANALOG IN  │
   │    MODULE    │ (PROCESSOR)  │ (24VDC SINK) │ (TRANSISTOR) │  (4-20 mA)  │
   │              │              │              │              │             │
   │ 120/240 VAC  │ Run/Rem/Prog │ Status LEDs  │ Status LEDs  │ Channel LEDs│
   │ Input Line   │ Eth/IP Port  │ [Opto-Isol.] │ [Opto-Isol.] │ [ADC Conv.] │
   │ +5V/+24V Bus │ USB Console  │ Screw Term.  │ Screw Term.  │ Shield Term.│
   ├──────────────┴──────────────┴──────────────┴──────────────┴─────────────┤
   │                     HIGH-SPEED BACKPLANE DATA BUS                       │
   └─────────────────────────────────────────────────────────────────────────┘

1. The Rack / Chassis and Backplane

The chassis provides physical mounting slots and houses the printed circuit board known as the backplane. The backplane carries parallel address, data, and control lines, along with internal low-voltage DC power supply rails (+3.3 V, +5 V, and +24 V DC). It facilitates high-speed, synchronized communication between the Central Processing Unit (CPU) and peripheral I/O modules.

2. The Power Supply Module

The power supply converts incoming industrial AC utility power (typically 120 V AC or 240 V AC single-phase) into clean, tightly regulated low-voltage DC power distributed across the backplane bus. Important engineering considerations include:

• Backplane Current Budgeting: Each module plugged into the chassis draws current from the +5 V and +24 V DC backplane rails. Electricians must calculate the total backplane current draw of all planned modules to ensure it does not exceed the power supply's continuous rated capacity (e.g., 5 A or 10 A at 5 V DC).
• Field Power Separation: The PLC chassis power supply powers only the internal backplane logic and processor. It does not supply field devices (sensors, limit switches, and solenoid valves). Field devices must be powered from separate external, certified Class 2 industrial 24 V DC power supplies per Canadian Electrical Code (CEC) Section 16.

3. Central Processing Unit (CPU)

The CPU is the computational brain of the PLC. It contains:

• Microprocessor / Arithmetic Logic Unit (ALU): Executes ladder logic instructions, arithmetic computations, and complex process algorithms.
• Firmware (Operating System): Stored in non-volatile flash ROM, coordinating memory management, communication protocols (EtherNet/IP, Modbus TCP, PROFINET), and diagnostic routines.
• User Memory (RAM): Battery-backed or supercapacitor-backed volatile SRAM that stores the user application program and operational data files.
• Non-Volatile Memory Card (SD / CompactFlash): Holds a non-volatile backup of the compiled user program and tag database, allowing automatic restoration upon power restoration or processor replacement.

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2. Memory Organization and Data File Architecture

The PLC processor structures its internal memory into distinct functional memory partitions, historically organized as tabular data files in legacy systems (such as Allen-Bradley SLC 500 / PLC-5) and mapped as structured memory in modern PACs:

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3. Discrete Input/Output Modules & Optical Isolation

Discrete I/O modules interface two-state field devices (switches, pushbuttons, pilot lights, motor starters) with the low-voltage microelectronics of the CPU. The fundamental engineering challenge in industrial automation is that field circuits operate in noisy, high-voltage environments prone to inductive kickback, lightning surges, and ground loops.

   FIELD ENVIRONMENT (24 VDC / 120 VAC)           │  PLC INTERNAL ENVIRONMENT (5 VDC)
                                                 │
   Field Input ───► [ Bridge ] ──► [ RC Filter ] ──┬──► [ Infrared ]     [ Photo-     ] ──► CPU Data
   Switch           [ Rect.  ]     [ Debounce ]  │    [ LED      ] ~~~ [ Transistor ]     Bus Logic
                                                 │    [          ]     [          ]     (Input Table)
   Field Return ─────────────────────────────────┴──► [ Opto-Coupler Isolation ]
                                                 │    (1500 V - 2500 V Dielectric)

Signal Conditioning and Optical Isolation Mechanics

Every industrial discrete input circuit incorporates four primary stages:

1. Rectification & Voltage Dropping: For 120 V AC inputs, a bridge rectifier converts the AC waveform to DC, and dropping resistors or Zener networks establish a defined threshold voltage (e.g., an input must exceed 79 V AC to register as an ON state, preventing induced cable crosstalk from causing false triggers).
2. Noise Filtering and Debouncing: A low-pass RC filter circuit delays the signal by 5 to 15 milliseconds. This debouncing delay eliminates mechanical switch contact bounce and suppresses high-frequency voltage transients.
3. Optical Isolation (Optocoupler): The incoming field current passes through an internal infrared light-emitting diode (LED). The emitted light crosses a transparent dielectric barrier (rated for 1,500 V to 2,500 V AC RMS breakdown) and impinges on the base of a silicon phototransistor. The phototransistor saturates, passing a clean 5 V DC logic signal to the internal CPU bus.
4. Status Indication: A panel-mounted LED is illuminated, providing the electrician with visual verification of circuit conduction.

Key Red Seal Principle: Because optical isolation breaks direct galvanic electrical continuity, high-voltage transients on field wiring are harmlessly dissipated, and field ground potential differences cannot circulate destructive ground-loop currents into the PLC processor backplane.

Discrete Output Module Types

Discrete output modules fall into three distinct semiconductor and electromechanical topologies:

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4. Sinking vs. Sourcing DC I/O Circuits (NPN vs. PNP)

One of the most frequently tested concepts on the Red Seal Industrial Electrician exam is the distinction between Sinking and Sourcing in 24 V DC solid-state circuits. The engineering definition is strictly based on conventional current flow (current flowing from positive potential $+24\text{ V}$ toward negative common $0\text{ V}$):

• Sourcing Device: Provides the electrical power source for the circuit. Conventional current exits the terminal from the $+24\text{ V DC}$ supply rail into the load.
• Sinking Device: Provides the ground return path for the circuit. Conventional current enters the terminal and drains into the $0\text{ V DC}$ (negative/common) supply rail.

   SOURCING SENSOR (PNP) TO SINKING INPUT MODULE:

   +24 VDC ──┬── [ Brown Wire ] ──► (PNP Sensor Internal Circuitry)
             │                                 │
             │                           [ PNP Switch ]
             │                                 │
             │                          [ Black Wire ] ───► Terminal In
             │                                                │
             │                                          [ Opto LED ] (PLC Module)
             │                                                │
   0 VDC ────┴── [ Blue Wire ] ───────────────────────────────┴──► Common (DC -)
                                                                 (Current Sinks to 0V)

   SINKING SENSOR (NPN) TO SOURCING INPUT MODULE:

   +24 VDC ───────────────────────────────────────────────────┬──► Common (DC +)
                                                              │   (Current Sources from +24V)
                                                        [ Opto LED ] (PLC Module)
                                                              │
             ┌── [ Brown Wire ] ──► (NPN Sensor Circuitry)    │
             │                                 │              │
             │                          [ NPN Switch ]        │
             │                                 │              │
             │                          [ Black Wire ] ◄──────┴──► Terminal In
             │                                 │
   0 VDC ────┴── [ Blue Wire ] ────────────────┴

The Fundamental Pairing Axiom

To establish a complete, functioning electrical circuit through the internal optocoupler LED, one side of the loop must source current, and the other side must sink current:

$\mathbf{Sourcing\ Sensor\ (PNP)} \longleftrightarrow \mathbf{Sinking\ Input\ Module\ (Common\ =\ 0\text{ V DC})}$ $\mathbf{Sinking\ Sensor\ (NPN)} \longleftrightarrow \mathbf{Sourcing\ Input\ Module\ (Common\ =\ +24\text{ V DC})}$

Standard 3-Wire DC Sensor Color Code (IEC 60947-5-2)

Industrial proximity sensors, optical photo-eyes, and ultrasonic sensors utilize standardized conductor insulation coloring:

• Brown (BN): $+24\text{ V DC}$ Power Supply (+)
• Blue (BU): $0\text{ V DC}$ Common Return (-)
• Black (BK): Primary Switched Output Signal (Normally Open or Normally Closed)
• White (WH): Secondary / Complementary Output Signal (in 4-wire sensors)

Field Diagnostic Alert: If an electrician erroneously connects a sourcing (PNP) sensor to a sourcing PLC input module (where the PLC common is strapped to $+24\text{ V DC}$), the circuit will fail to operate. The sensor will attempt to output $+24\text{ V DC}$ to an input terminal that is also pulled up to $+24\text{ V DC}$. With zero electrical potential difference across the optocoupler LED ($\Delta V = 24 - 24 = 0\text{ V}$), zero current flows, and the PLC input will never turn ON.

5. Analog I/O Modules & Signal Conversion

Discrete modules process binary conditions (1 or 0), whereas Analog I/O modules monitor and control continuous physical process variables such as temperature, hydraulic pressure, slurry flow rate, and motor shaft speed.

Standard Industrial Signal Ranges

1. 4-20 mA DC Current Loops: The universal standard in process automation. Advantages include complete immunity to line resistance voltage drops over long distances, high electromagnetic noise rejection, and a built-in live zero (4 mA = 0% process level). If a field wire breaks or a power supply fails, loop current drops to 0 mA, allowing the PLC to instantly trigger a "Cable Break / Sensor Fault" diagnostic alarm.
2. 0-10 V DC Voltage Loops: Typically used in short-run, clean environments such as commercial HVAC air-handling units and local VFD speed potentiometer circuits. Disadvantages include vulnerability to line resistance voltage drops ($V = I \cdot R$) and induced electromagnetic interference (EMI).

   ANALOG INPUT CONVERSION (ANALOG-TO-DIGITAL CONVERTER - ADC):

   Process Signal               Current Shunt              A/D Converter             Input Image Table
   4-20 mA Loop ────────► [ 250 Ohm Precision ] ──► [ 16-Bit Successive ] ──► [ N7:0 or Real Tag ]
                          [ Resistor (1 - 5 V) ]     [ Approx. Register ]     [ 0 to 32,767 Counts]

Analog-to-Digital Converter (ADC) Resolution

The analog input module converts continuous current or voltage into a digital integer using an Analog-to-Digital Converter (ADC). The resolution of the ADC dictates the smallest physical process change the PLC can detect, governed by the bit depth ($n$):

$\text{Total Quantization Levels} = 2^n$ $\text{Resolution per Step} = \frac{\text{Full Signal Span}}{2^n - 1}$

Quantization Error

Quantization is the process of mapping a continuous analog voltage to a discrete integer step. Quantization error represents the inherent difference between the actual physical analog value and the digitized integer representation. It is mathematically bounded by $\pm \frac{1}{2}$ the Least Significant Bit (LSB). Higher bit-depth converters (16-bit vs. 12-bit) significantly reduce quantization noise, enabling tight PID closed-loop control on critical industrial processes.

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6. The PLC Operating Scan Cycle

Unlike a desktop personal computer that executes event-driven software tasks asynchronously, an industrial PLC operates on a deterministic, continuous, four-phase sequential scan cycle:

   ┌─────────────────────────────────────────────────────────────────────────┐
   │                       THE PLC OPERATING SCAN CYCLE                      │
   └────────────────────────────────────┬────────────────────────────────────┘
                                        │
         ┌──────────────────────────────▼──────────────────────────────┐
         │ 1. INPUT SCAN                                               │
         │ CPU interrogates physical input modules; copies digital     │
         │ states into the Input Image Table memory partition.         │
         └──────────────────────────────┬──────────────────────────────┘
                                        │
         ┌──────────────────────────────▼──────────────────────────────┐
         │ 2. PROGRAM EXECUTION                                        │
         │ CPU solves ladder rungs sequentially (top-to-bottom,        │
         │ left-to-right). Results update the Output Image Table.      │
         └──────────────────────────────┬──────────────────────────────┘
                                        │
         ┌──────────────────────────────▼──────────────────────────────┐
         │ 3. COMMUNICATIONS & HOUSEKEEPING                            │
         │ CPU executes internal RAM checks, updates watchdog timer,   │
         │ services HMI requests, and exchanges fieldbus packets.      │
         └──────────────────────────────┬──────────────────────────────┘
                                        │
         ┌──────────────────────────────▼──────────────────────────────┐
         │ 4. OUTPUT SCAN                                              │
         │ Output Image Table data is transferred simultaneously       │
         │ across backplane to physical output module field switches.  │
         └──────────────────────────────┬──────────────────────────────┘
                                        │
                                        └──────────► (Repeats Continuously)

Detailed Phase Analysis

Phase 1: Input Scan

The CPU broadcasts a query across the chassis backplane. Each input module transmits the electrical state of its physical screw terminals, which the CPU writes directly into the Input Image Table (e.g., I:1.0). If a field switch transitions from open to closed during program execution or output scan, that state change is completely ignored until the next input scan.

Phase 2: Program Execution (Ladder Logic Solve)

The CPU executes the compiled user program sequentially, starting at Rung 0 and processing downward, evaluating instructions from left to right across each branch. The processor references only the Input Image Table and internal memory bits—it does not read physical field terminals during this phase. As logic rungs evaluate true or false, the CPU immediately updates internal data tables and the Output Image Table (e.g., O:2.0). Physical field devices connected to output terminals do not change state during this phase.

Phase 3: Communications & Housekeeping Diagnostics

The CPU performs internal hardware integrity verifications:

• Watchdog Timer Reset: An internal hardware safety timer is cleared. If program execution hangs in an infinite loop and the watchdog timer times out (typically set between 100 ms and 500 ms), the CPU faults immediately and de-energizes all physical outputs.
• Diagnostic Overhead: Parity checks, memory checksums, and temperature monitoring.
• Network Servicing: Messaging over EtherNet/IP, reading remote I/O packets, updating SCADA systems, and servicing Human-Machine Interface (HMI) polling.

Phase 4: Output Scan

The data stored in the Output Image Table is written simultaneously across the backplane bus to the physical output module latch registers. The solid-state transistors, triacs, or interposing dry relay contacts change conduction state, applying or removing voltage to field actuators, indicator lamps, and motor starter coils.

Scan Time ($T_{\text{scan}}$) & High-Speed Counting Limitations

The total time required to complete one full cycle through all four phases is the scan time, typically ranging from 1 ms to 20 ms depending on processor clock speed, chassis backplane traffic, and ladder program length.

The Nyquist / High-Speed Pulse Problem: If a field sensor produces an electrical pulse whose duration ($t_{\text{pulse}}$) is shorter than the PLC scan time ($t_{\text{pulse}} < T_{\text{scan}}$), the pulse may occur and vanish entirely while the CPU is engaged in program execution or housekeeping. Consequently, the input scan will miss the event entirely!

   Input Pulse:            ┌──────┐ (Duration = 3 ms) ◄── MISSED BY INPUT SCAN!
   ────────────────────────┘      └────────────────────────────────────────────
   PLC Scan Cycle:  |  Program Exec  | Diagnostics | Output |  Input Scan  |
                    │◄─────────────────── 15 ms ──────────────────────────►│

Solutions for High-Speed Signals

1. High-Speed Counter (HSC) Modules: Dedicated microprocessor cards with onboard hardware accumulators that count pulses up to 100 kHz or 1 MHz independently of the CPU scan cycle. The main PLC CPU simply reads the accumulated count total from the card during normal I/O updates.
2. Immediate I/O Instructions: Instructions such as Immediate Input (IIM) and Immediate Output (IOM) force the CPU to temporarily halt ladder execution, immediately poll or update the specified physical module across the backplane, and resume execution.
3. Event-Driven Interrupts: Hardware input interrupts (DII) or Selectable Timed Interrupts (STI) that instantly suspend the main ladder scan to execute a dedicated high-priority interrupt subroutine.

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7. Concrete Industrial Scenario: Diagnosing a Packaging Line Cylinder

In an Ontario food processing plant, a high-speed carton reject cylinder controlled by a 24 V DC transistor output began failing intermittently on a packaging line running at 180 cartons per minute. Each carton was detected by a retroreflective photo-eye.

1. Diagnostic Investigation: An industrial electrician connected a laptop running diagnostic software and observed that the photo-eye LED was flashing physically on every carton, but the carton reject counter in ladder logic was recording only 140 counts per minute.
2. Scan Time Evaluation: The processor status file (S:4) revealed that a recently added data logging routine had increased the average PLC scan time from 6 ms to 28 ms. The optical sensor signal was active for only 12 ms as each carton moved across the conveyor belt at high speed.
3. Root Cause Analysis: Because the 12 ms optical pulse was shorter than the 28 ms scan cycle, cartons passing during Phase 2 (Program Execution) or Phase 3 (Housekeeping) occurred between input scans and were completely ignored.
4. Corrective Implementation: The electrician rewired the photo-eye to a dedicated high-speed DC input terminal configured as an Input Interrupt. The incoming positive edge instantly forced an interrupt routine that recorded the carton and latched the reject command, restoring 100% detection reliability.