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Exam Review

Key Facts: Engineer Electronics Exam

80 items

Official written exam paper length (4 subjects × 20)

Q-Net Engineer Electronics qualification standard (jmCd 1170)

120 minutes

Written examination duration (30 minutes per subject)

Q-Net 필기시험 접수안내 (기사·산업기사 과목별 30분)

40 / 60

Passing standard: 40% individual subject floor (과락) and 60% overall average

National Technical Qualifications Act Enforcement Rules

KRW 19,400

Written exam registration fee

Q-Net 전자기사 page, checked 2026-09-20

KRW 44,800

Practical exam registration fee

Q-Net 전자기사 page, checked 2026-09-20

2 years

Exemption duration for written test pass

National Technical Qualifications Act Enforcement Decree Article 21

전자기사 is South Korea's premier Engineer-grade electronics qualification (jmCd 1170, MOTIR / HRD Korea). The official written exam comprises 80 MCQs across four subjects (20 per subject, 30 min each, 120 min total) requiring a 40% per-subject floor and 60% overall average, followed by an approximately 6.5-hour hands-on practical exam (작업형) in electronic circuit design and practice. Official Q-Net fees are KRW 19,400 (written) and KRW 44,800 (practical). OpenExamPrep provides an independent 100-question English MCQ practice bank.

Sample Engineer Electronics Practice Questions

Try these sample questions to review concepts for the Engineer Electronics exam. Each question includes a detailed explanation. Start the interactive quiz above for the full 100+ question experience with AI tutoring.

1Two point charges of +4 μC and −4 μC are placed 2 m apart in free space. According to Coulomb's law (쿨롱의 법칙), what is the magnitude of the electrostatic force on either charge? Use 1/(4πϵ0) = 9×10^9 N·m²/C².
A.9.0×10^−3 N
B.7.2×10^−2 N
C.1.8×10^−2 N
D.3.6×10^−2 N
Explanation: Coulomb's law gives F = (1/(4πϵ0)) |q1 q2| / R². Substituting the values yields F = (9×10^9)(4×10^−6)(4×10^−6)/(2)² = (9×10^9)(16×10^−12)/4 = 144×10^−3 / 4 = 0.036 N = 3.6×10^−2 N. The force is attractive because the charges have opposite signs, but the magnitude is independent of sign.
2A point charge Q is enclosed by a closed Gaussian surface (가우스면) in free space. Gauss's law states that the total electric flux leaving the surface equals which quantity?
A.4πQ / ϵ0
B.Q ϵ0
C.Q / (4πϵ0)
D.Q / ϵ0
Explanation: In integral form, Gauss's law is ∮ D · dS = Q_enclosed, and in free space D = ϵ0 E, so ∮ E · dS = Q_enclosed / ϵ0. The result depends only on the enclosed charge, not on the shape of the surface. This is the electric-flux statement used throughout 전기자기학 electrostatics.
3In a static electric field, the relationship between electric field intensity E and electric scalar potential V is which of the following?
A.E = ∇V
B.E = −∇ × V
C.E = ∇ × V
D.E = −∇V
Explanation: Conservative electrostatic fields satisfy E = −∇V, so the field points from higher to lower potential. The negative gradient also ensures that the line integral of E between two points equals the potential difference V_a − V_b. Curl identities then give ∇ × E = 0 in the static case, consistent with Faraday's law when ∂B/∂t = 0.
4A parallel-plate capacitor (평행판 커패시터) has plate area A, plate separation d, and a linear dielectric of permittivity ϵ filling the gap. Neglecting fringing, what is its capacitance?
A.ϵ A d
B.ϵ d / A
C.A / (ϵ d)
D.ϵ A / d
Explanation: Uniform D = ϵ E = σ between the plates and V = E d together give C = Q/V = (σ A)/(E d) = ϵ A / d. Increasing area stores more charge at a given voltage, while increasing separation reduces capacitance. Dielectric permittivity ϵ = ϵr ϵ0 raises C relative to an air-filled capacitor.
5Ampere's circuital law in magnetostatics (앙페르의 주회법칙) states that the line integral of H around a closed path equals which quantity?
A.The time derivative of electric flux
B.The enclosed free charge Q_f
C.The magnetic flux Φ through any surface
D.The enclosed free current I_f
Explanation: In magnetostatics, ∮ H · dl = I_f,enclosed. For a long straight wire this immediately yields H = I/(2πr). When displacement current is present, Maxwell's correction adds ϵ ∂E/∂t, but the magnetostatic statement uses conduction (free) current only.
6A conducting loop is linked by increasing magnetic flux directed out of the page. By Lenz's law (렌츠의 법칙), the induced current produces a magnetic field that is:
A.Out of the page, aiding the increase of flux
B.Zero because a closed loop cannot store energy
C.Tangential to the loop with no axial component
D.Into the page, opposing the increase of flux
Explanation: Faraday's law gives emf = −dΦ/dt. Lenz's law identifies the minus sign: the induced current creates flux that opposes the change. Increasing outward flux therefore drives current whose own field is into the page. This opposition is required by conservation of energy.
7Maxwell's correction to Ampere's law introduces the displacement current density J_d. In a linear dielectric, J_d is equal to:
A.σ E
B.∇ × H
C.μ ∂H/∂t
D.∂D/∂t
Explanation: Displacement current density is J_d = ∂D/∂t. It allows Ampere's law to remain consistent with charge continuity in capacitors, where conduction current stops at the plates but D still changes with time. In free space D = ϵ0 E, so J_d = ϵ0 ∂E/∂t.
8The intrinsic impedance (고유임피던스) of a uniform plane wave in free space is closest to which value?
A.50 Ω
B.300 Ω
C.75 Ω
D.120π Ω (approximately 377 Ω)
Explanation: η0 = √(μ0/ϵ0) = 120π Ω ≈ 377 Ω. It is the ratio |E|/|H| for a TEM plane wave in free space. Characteristic impedances such as 50 Ω or 75 Ω belong to transmission-line systems, not to free-space plane waves.
9A coaxial capacitor has inner radius a = 5 mm, outer radius b = 10 mm, and length ℓ = 20 cm, filled with a dielectric of ϵr = 2.25. Using C = 2πϵℓ / ln(b/a) and ϵ0 = 8.85×10^−12 F/m, the capacitance is closest to:
A.18 pF
B.9 pF
C.72 pF
D.36 pF
Explanation: ln(b/a) = ln(2) ≈ 0.693. Then 2πϵℓ = 2π(2.25)(8.85×10^−12)(0.20) ≈ 2.50×10^−11. Dividing by 0.693 gives C ≈ 36.1 pF. The 1/ln(b/a) dependence is the standard coaxial capacitance formula used in 전기자기학.
10A 4 μF capacitor is charged to 100 V. How much electrostatic energy is stored in the capacitor?
A.0.40 J
B.0.04 J
C.0.20 J
D.0.02 J
Explanation: The stored energy is W = (1/2) C V² = 0.5 × 4×10^−6 × (100)² = 0.5 × 4×10^−6 × 10^4 = 0.02 J. Equivalent forms are W = (1/2) Q V and W = Q²/(2C). Energy resides in the electric field, with density (1/2) D · E.

About the Engineer Electronics Exam

Engineer Electronics (전자기사) is South Korea's benchmark Engineer-grade national technical qualification in electronic hardware engineering, administered by the Human Resources Development Service of Korea (HRD Korea / Q-Net) under the Ministry of Trade, Industry and Resources (MOTIR / 산업통상부). The written CBT examination evaluates 80 four-option multiple-choice questions across four core subjects: Electromagnetics (전기자기학), Digital Applied Circuits (디지털응용회로), Electronic Circuit Design (전자회로설계), and Electronic Circuit Verification (전자회로검증). Candidates passing the written paper advance to an intensive ~6.5-hour work-type practical examination (작업형) covering schematic design, circuit simulation, PCB CAD artwork, breadboard prototyping, soldering, signal measurement, and hardware debugging (전자회로설계 및 실무). OpenExamPrep provides an independent English-language MCQ study adaptation designed for mastery of core circuit theorems, rigorous calculations, and Korean engineering terminology.

Exam sponsor: HRD Korea (Q-Net) / Ministry of Trade, Industry and Resources (MOTIR / 산업통상부). The requirements and fees below concern the certification or admission exam, separate from our free practice resources.

Assessment

Written paper covering 전기자기학 (Electromagnetics), 디지털응용회로 (Digital Applied Circuits), 전자회로설계 (Electronic Circuit Design), and 전자회로검증 (Electronic Circuit Verification) with 20 items and 30 minutes each (80 items / 120 minutes total), followed by an approximately 6.5-hour, 100-point work-type practical examination in 전자회로설계 및 실무. OpenExamPrep study weights cover all four written subjects with 25 questions each.

Time Limit

120 minutes for the four written subjects (30 minutes each); practical: ~6.5 hours hands-on work component

Passing Score

Written: 40+ per subject (과락 floor) and 60 average; practical: 60/100

Exam / Certification Fees

KRW 19,400 written / KRW 44,800 practical (Q-Net, 2026-09-20)

Exam sponsor website

Fees, eligibility, and exam policies can change. Confirm them with the exam sponsor before applying or paying.

Official sources

Our practice resources: topics covered

We aim to reflect publicly available exam outlines and topic information in our study resources. Coverage, format, and difficulty may differ from the actual exam, and we cannot guarantee that every detail is accurate or current. Confirm exam requirements, fees, and policies with the official exam sponsor.

25%

Electromagnetics (전기자기학)

Electrostatic field theory, Coulomb's law, Gauss's law, electric flux density, Poisson and Laplace equations, capacitance of geometric configurations (parallel-plate, coaxial, spherical), dielectric boundary conditions, Ohm's point form (J = σE), Biot-Savart law, Ampere's circuital law, magnetic vector potential, Lorentz force, magnetic boundary conditions, inductances, Faraday's law, Maxwell's four equations, uniform plane waves, intrinsic impedance, skin depth, Poynting vector, and transmission lines (characteristic impedance, reflection coefficient, VSWR, input impedance).

25%

Digital Applied Circuits (디지털응용회로)

Number representations (binary, 2's complement, Gray code, BCD, ASCII), combinational logic simplification via Boolean algebra and Karnaugh maps up to 5 variables, hazard detection and elimination, arithmetic circuits (full adders, subtractors, CLA), multiplexers, demultiplexers, decoders, priority encoders, sequential flip-flops (SR, D, JK, T), timing constraints (setup/hold time, metastability), registers, counters (synchronous, asynchronous, ring, Johnson), finite state machines (Mealy and Moore), memory organization (SRAM, DRAM, Flash), PLDs and FPGA architecture, and data conversion (ADC and DAC principles, resolution, quantization error, sampling theorem).

25%

Electronic Circuit Design (전자회로설계)

Semiconductor diode rectifiers, clippers, clampers, and Zener regulators; BJT DC biasing (fixed, emitter, voltage divider) and small-signal modeling (hybrid-pi, r_e, h-parameters); BJT amplifier configurations (common-emitter, common-collector, common-base); FET characteristics (JFET, MOSFET) and amplifier topologies (CS, CD, CG); amplifier frequency response, Miller theorem, dominant poles, and gain-bandwidth product; feedback amplifier topologies (series-shunt, shunt-series, series-series, shunt-shunt); operational amplifier linear and non-linear applications (inverting, non-inverting, summing, instrumentation, integrators, differentiators, Sallen-Key active filters); oscillators (Barkhausen criterion, Wien bridge, Colpitts, Hartley, crystal, 555 timer multivibrators); and power amplifier classifications (Class A, B, AB, C, push-pull, efficiency calculations).

25%

Electronic Circuit Verification (전자회로검증)

SPICE electronic circuit simulation (DC operating point, DC sweep, AC frequency response, transient analysis, Monte Carlo statistical analysis, PVT corner analysis); benchtop test and measurement instrumentation (digital storage oscilloscopes, bandwidth, sampling rate, real-time vs equivalent-time, probe compensation and loading, spectrum analyzers, RBW/VBW, logic analyzers, digital multimeters); hardware testing methodologies (in-circuit testing ICT, functional testing, IEEE 1149.1 JTAG boundary scan); signal integrity (transmission line reflections, ringing, crosstalk, ground bounce, power distribution network decoupling); and PCB design rules, microstrip/stripline trace impedance, grounding strategies, ESD protection, and EMC/EMI radiated and conducted emissions standards.

Preparing for the Engineer Electronics Exam

What You Need to Know

  • Passing score: Written: 40+ per subject (과락 floor) and 60 average; practical: 60/100
  • Assessment: Written paper covering 전기자기학 (Electromagnetics), 디지털응용회로 (Digital Applied Circuits), 전자회로설계 (Electronic Circuit Design), and 전자회로검증 (Electronic Circuit Verification) with 20 items and 30 minutes each (80 items / 120 minutes total), followed by an approximately 6.5-hour, 100-point work-type practical examination in 전자회로설계 및 실무. OpenExamPrep study weights cover all four written subjects with 25 questions each.
  • Time limit: 120 minutes for the four written subjects (30 minutes each); practical: ~6.5 hours hands-on work component
  • Exam / certification fees: KRW 19,400 written / KRW 44,800 practical (Q-Net, 2026-09-20) Official sources

Using Our Practice Resources

  • Work through all 100 available questions
  • Review every answer and explanation
  • Track weak areas and revisit them
  • Use our AI tutor for tough concepts

Engineer Electronics: Suggested Study Strategy

1Master high-calculation Electromagnetics (전기자기학) early: Field calculations, boundary conditions, wave propagation constants, and transmission line parameters require quick formula recall. Memorize standard relationships (such as intrinsic impedance η = √(μ/ε), phase velocity v = 1/√(με), reflection coefficient Γ = (ZL − Z0)/(ZL + Z0), and boundary relations D1n = D2n, E1t = E2t) to save time on the 30-minute-per-subject clock.
2Protect against the 40% 과락 floor: Electromagnetics and Electronic Circuit Design consistently cause the highest failure rates due to multi-step numerical calculations. Prioritize achieving at least 10–12 reliable correct answers in these calculation-heavy subjects before optimizing for higher overall scores.
3Connect Korean technical terminology with circuit schematics: The exam uses specific Korean technical terms such as 반사계수 (reflection coefficient), 특성임피던스 (characteristic impedance), 부하선 (load line), 여유도 (margin), 피부효과 (skin depth), and 왜곡도 (distortion). Pairing these terms with English equivalents strengthens comprehension.
4Review practical skills alongside verification theory: Verification topics like SPICE analysis, DSO triggering, probe loading (10x attenuation capacitance), JTAG boundary scan, and PCB microstrip impedance directly prepare candidates for the ~6.5-hour work-type practical exam (작업형).

Frequently Asked Questions

What is the official structure of the Engineer Electronics (전자기사) examination?

The official qualification examination consists of two distinct stages. The first stage is a 120-minute computer-based written test (CBT) consisting of 80 four-option multiple-choice questions (20 questions across four subjects: Electromagnetics, Digital Applied Circuits, Electronic Circuit Design, and Electronic Circuit Verification). The second stage is an intensive ~6.5-hour hands-on practical examination (작업형) titled 전자회로설계 및 실무 (Electronic Circuit Design and Practice), evaluating schematic design, circuit simulation, PCB artwork, board assembly/soldering, oscilloscope measurement, and circuit troubleshooting.

What are the passing criteria and the 'gwarak' (과락) disqualification rule?

To pass the written examination, a candidate must obtain an overall average score of at least 60% (48 out of 80 questions correct across all four subjects) while satisfying the mandatory 40% subject floor ('gwarak', 과락). A candidate who scores below 40% (fewer than 8 out of 20 correct) in any single subject fails the examination automatically, regardless of how high their average or total score is. The practical examination requires a score of at least 60 points out of 100.

What are the exam registration fees and where do candidates register?

As published on Q-Net for Engineer Electronics (jmCd 1170, verified for 2026), the written exam registration fee is KRW 19,400, and the practical exam fee is KRW 44,800 (totaling KRW 64,200). Official registration is conducted through the HRD Korea portal (q-net.or.kr) during designated national examination registration windows.

How long is a written exam pass valid towards the practical examination?

Under Article 21 of the Enforcement Decree of the National Technical Qualifications Act (국가기술자격법 시행령 제21조), candidates who pass the written examination are granted a 2-year exemption from repeating the written examination, calculated from the official pass announcement date. During this two-year window, candidates can directly register for and challenge the practical examination.

How does OpenExamPrep's question bank correspond to the official Q-Net exam?

OpenExamPrep provides an independent English-language MCQ practice bank of 100 questions (25 questions per subject) designed for conceptual mastery, rigorous mathematical calculation practice, and bilingual technical vocabulary acquisition. It is not affiliated with or endorsed by HRD Korea or 산업통상부 (MOTIR). The official national exam is administered in Korean at designated testing facilities.