100+ Free ISRO Scientist/Engineer SC (Computer Science) Practice Questions

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Sample ISRO Scientist/Engineer SC (Computer Science) Practice Questions

Try these sample questions to test your ISRO Scientist/Engineer SC (Computer Science) exam readiness. Each question includes a detailed explanation. Start the interactive quiz above for the full 100+ question experience with AI tutoring.

1A 2-to-1 multiplexer has data inputs D0 and D1, and a select input S. If S = A, D0 = B, and D1 = B', what logic function is implemented at the output Y?

A.Y = A XOR B

B.Y = A XNOR B

C.Y = A AND B

D.Y = A OR B

Explanation: The output of a 2-to-1 multiplexer is Y = S'D0 + SD1. Substituting the given values: Y = A'B + AB'. This represents the Exclusive-OR (XOR) logic function of A and B.

2Minimize the Boolean function F(A, B, C, D) = Σm(0, 2, 5, 7, 8, 10, 13, 15) using a Karnaugh map.

A.B'D' + BD

B.B'D + BD'

C.AD' + B'D

D.A'D' + BD

Explanation: The minterms are split into two groups: Group 1: m(0, 2, 8, 10) forms a quad at the corners, which simplifies to B'D'. Group 2: m(5, 7, 13, 15) forms a quad in the center columns, which simplifies to BD. Combining them gives B'D' + BD.

3For a JK flip-flop, if the current state is Q = 0 and the desired next state is Q+ = 1, what should the input values of J and K be?

A.J = 1, K = X (don't care)

B.J = X, K = 1

C.J = 0, K = X

D.J = 1, K = 0

Explanation: From the JK excitation table, a state transition from 0 to 1 can be achieved by either Set (J=1, K=0) or Toggle (J=1, K=1). Therefore, J must be 1, while K is a don't care (X).

4A 4-bit ripple counter uses flip-flops with a propagation delay of 15 ns each. What is the maximum frequency of the clock signal at which the counter can operate reliably without any decoding spikes?

A.16.67 MHz

B.66.67 MHz

C.25.00 MHz

D.8.33 MHz

Explanation: For an n-bit ripple counter, the worst-case propagation delay is n * t_pd, where t_pd is the delay of a single flip-flop. Here, total delay = 4 * 15 ns = 60 ns. To prevent overlapping states, the clock period T must be greater than or equal to the total delay (T >= 60 ns). The maximum clock frequency is f_max = 1 / T = 1 / 60 ns ≈ 16.67 MHz.

5What is the minimum number of 2-input NOR gates required to implement a 2-input XOR gate?

A.5

B.4

C.6

D.3

Explanation: To implement XOR (A'B + AB') using NOR gates: 1st gate: G1 = A NOR B. 2nd gate: G2 = A NOR G1. 3rd gate: G3 = B NOR G1. 4th gate: G4 = G2 NOR G3. This output G4 represents A XNOR B. To get XOR, we pass G4 through a 5th NOR gate acting as an inverter. Thus, 5 NOR gates are required.

6Convert the decimal fraction -0.4375 into the IEEE 754 single-precision floating-point format. What is its representation in hexadecimal?

A.0xBEFFFF00

B.0xBEFFE000

C.0xBE600000

D.0x3EFFE000

Explanation: -0.4375 in binary is -0.0111 = -1.11 * 2^(-2). The sign bit S = 1 (negative). The biased exponent E = -2 + 127 = 125, which is 01111101 in binary. The normalized mantissa M = 11000... (fractional part of 1.11). Combining them: 1 (sign) 01111101 (exponent) 11000000000000000000000 (mantissa). Grouping into 4-bit nibbles: 1011 1110 1111 1110 0000 0000 0000 0000 = 0xBEFFE000.

7In 2's complement representation, when adding two n-bit signed integers, which Boolean condition detects an arithmetic overflow?

A.Overflow = Cin ⊕ Cout, where Cin is the carry into the sign bit and Cout is the carry out from the sign bit

B.Overflow = Cout only

C.Overflow = Cin only

D.Overflow = MSB(A) ⊕ MSB(B)

Explanation: Arithmetic overflow in 2's complement addition occurs if the carry into the sign bit (Cin) differs from the carry out of the sign bit (Cout). Therefore, the condition is Cin XOR Cout (Cin ⊕ Cout).

8If a number system with base R satisfies the equation (312)_R = (82)_10, what is the value of the base R?

A.5

B.6

C.8

D.7

Explanation: Expanding the positional value of (312)_R gives 3*R^2 + 1*R + 2. Setting this equal to 82 yields 3R^2 + R + 2 = 82, i.e. 3R^2 + R - 80 = 0, which factors as (3R + 16)(R - 5) = 0. The only positive integer root is R = 5, and a valid base must also exceed the largest digit used (3), so R = 5 is consistent. Verification: (312)_5 = 3*25 + 1*5 + 2 = 82.

9A main memory has a capacity of 16 MB and is word-addressable (1 word = 4 bytes). A direct-mapped cache has a size of 64 KB with a block size of 64 bytes. What are the sizes of the Tag, Index, and Block Offset fields in bits, respectively?

A.8 bits, 10 bits, 4 bits

B.10 bits, 8 bits, 4 bits

C.8 bits, 10 bits, 6 bits

D.6 bits, 10 bits, 6 bits

Explanation: Main memory capacity = 16 MB = 2^24 bytes. Since it is word-addressable (1 word = 4 bytes), the number of words is 16 MB / 4 bytes = 4 M words = 2^22 words. Thus, the physical address is 22 bits. Cache size = 64 KB = 2^16 bytes. Block size = 64 bytes = 16 words = 2^4 words. So, Block Offset = 4 bits. Number of cache lines = Cache size / Block size = 64 KB / 64 bytes = 1024 lines = 2^10 lines. So, Index = 10 bits. Tag bits = Total physical address bits - (Index bits + Offset bits) = 22 - (10 + 4) = 8 bits. Thus, the Tag, Index, and Block Offset sizes are 8 bits, 10 bits, and 4 bits.

10An instruction pipeline consists of 5 stages with delays of 2.0 ns, 1.5 ns, 2.5 ns, 1.8 ns, and 2.2 ns. The pipeline registers add an overhead delay of 0.2 ns. What is the speedup of this pipeline compared to a non-pipelined processor for a very large number of instructions, assuming no pipeline hazards?

A.3.70

B.5.00

C.4.20

D.3.10

Explanation: Non-pipelined execution time for one instruction = Sum of stage delays = 2.0 + 1.5 + 2.5 + 1.8 + 2.2 = 10.0 ns. Pipelined clock period (T_p) is determined by the slowest stage delay + register overhead = max(2.0, 1.5, 2.5, 1.8, 2.2) + 0.2 = 2.5 + 0.2 = 2.7 ns. For a very large number of instructions (N -> infinity), the execution time per instruction in the pipeline approaches T_p = 2.7 ns. The asymptotic speedup is S = Time_non-pipelined / Time_pipelined = 10.0 / 2.7 ≈ 3.70.

About the ISRO Scientist/Engineer SC (Computer Science) Exam

The ISRO Scientist/Engineer 'SC' Computer Science written test recruits B.E./B.Tech. graduates into India's space programme. The exam tests core Computer Science knowledge at undergraduate depth plus aptitude, followed by a technical interview. Successful candidates join ISRO centres as Scientist/Engineer 'SC' working on mission software, satellite control systems, high-performance computing, data processing, and cybersecurity.

Assessment

Two-stage selection per ICRB Scientist/Engineer 'SC' recruitment: (1) Written test — 95 objective MCQs totalling 100 marks in 120 minutes with Part A core CS (80 questions, +1 correct) and Part B aptitude (15 questions, 20 marks), with negative marking of −1/3 for wrong answers; (2) Personal interview for candidates shortlisted in approximately 1:5 ratio.

Time Limit

120 minutes

Passing Score

Minimum 50% in Part A and Part B individually for general, 40% for reserved categories

Exam Fee

₹750 processing fee per application (refundable to ₹250 or ₹0 depending on category and attendance) (ISRO Centralised Recruitment Board (ICRB))

ISRO Scientist/Engineer SC (Computer Science) Exam Content Outline

Digital Logic

Boolean algebra, logic gates, minimization, combinational and sequential circuits, flip-flops, counters

10%

Computer Organization

Machine instructions, addressing modes, ALU, data-path, CPU control, pipelining, memory hierarchy, I/O interface

10%

Programming & Data Structures

Programming in C, arrays, stacks, queues, linked lists, trees, binary search trees, binary heaps, graphs

10%

Algorithms

Searching, sorting, hashing, asymptotic analysis, greedy, dynamic programming, divide-and-conquer, graph search

Theory of Computation

Regular expressions, finite automata, context-free grammars, pushdown automata, Turing machines, decidability

Compiler Design

Lexical analysis, parsing, syntax-directed translation, intermediate code generation, code optimization

10%

Operating Systems

Processes, threads, inter-process communication, concurrency, synchronization, deadlocks, CPU scheduling, memory management, virtual memory, file systems

Databases

ER model, relational model, database design (integrity constraints, normal forms), query languages (SQL), transactions, concurrency control

10%

Computer Networks

OSI/TCP-IP stacks, routing, flow/error control, LAN technologies, IP addressing, TCP/UDP, application layer protocols, network security

10%

Software Engineering

Software development life cycle, planning, requirements, design, coding, testing, metrics

10%

General Aptitude

Quantitative aptitude, numerical ability, logical reasoning, verbal ability

How to Pass the ISRO Scientist/Engineer SC (Computer Science) Exam

What You Need to Know

Passing score: Minimum 50% in Part A and Part B individually for general, 40% for reserved categories
Assessment: Two-stage selection per ICRB Scientist/Engineer 'SC' recruitment: (1) Written test — 95 objective MCQs totalling 100 marks in 120 minutes with Part A core CS (80 questions, +1 correct) and Part B aptitude (15 questions, 20 marks), with negative marking of −1/3 for wrong answers; (2) Personal interview for candidates shortlisted in approximately 1:5 ratio.
Time limit: 120 minutes
Exam fee: ₹750 processing fee per application (refundable to ₹250 or ₹0 depending on category and attendance)

Keys to Passing

Complete 500+ practice questions
Score 80%+ consistently before scheduling
Focus on highest-weighted sections
Use our AI tutor for tough concepts

ISRO Scientist/Engineer SC (Computer Science) Study Tips from Top Performers

1Focus heavily on core Computer Science subjects such as Computer Networks, Operating Systems, Data Structures, and Algorithms, which form the bulk of Part A.

2Solve previous GATE CS papers, as the difficulty level of technical questions in the ISRO Scientist exam is highly comparable to GATE objective questions.

3Manage time carefully during the exam. With 95 questions in 120 minutes, you have a little over one minute per question.

4Pay attention to negative marking. A -1/3 penalty applies to both parts, so avoid blind guessing on difficult questions.

Frequently Asked Questions

What is the ISRO Scientist/Engineer SC Computer Science exam pattern?

The written test consists of 95 multiple-choice questions (MCQs) to be solved in 120 minutes. It is divided into Part A, which contains 80 discipline-specific Computer Science questions (1 mark each), and Part B, which contains 15 general aptitude questions (20 marks total). Both parts carry a negative marking of -1/3 for each incorrect response.

What is the application fee and refund policy for ISRO Scientist recruitment?

The application fee is ₹750. For candidates who appear in the written test, the fee is partially or fully refunded: Women, SC/ST, PwBD, and Ex-Servicemen receive a full refund of ₹750, while General and OBC male candidates receive a refund of ₹500 (retaining ₹250 as the application fee).

What are the qualifying criteria for the ISRO written test?

Candidates must secure a minimum of 50% marks in Part A and Part B individually to qualify for the interview shortlisting. The qualifying cutoff is relaxed to 40% for reserved category candidates. Shortlisting for the interview is typically done in a 1:5 ratio.

How does the practice bank prepare me for the exam?

This free practice bank contains exactly 100 questions, consisting of 80 core Computer Science questions spanning the complete syllabus and 20 general aptitude questions. Each question is designed to match the level of the ICRB written test with detailed explanations and wrong-option breakdowns.

100+ Free ISRO Scientist/Engineer SC (Computer Science) Practice Questions

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