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Key Facts: CAPE Computer Science Unit 1 Exam

45 questions

Paper 01 consists of 45 compulsory multiple-choice items, 15 per module

CXC CAPE Computer Science syllabus

1 hr 30 mins

Duration of the Paper 01 multiple-choice examination

CXC CAPE Computer Science syllabus

30%

Weight of Paper 01 toward the overall CAPE Unit 1 grade

CXC CAPE Computer Science syllabus

3 modules

Computer Architecture, Problem-Solving with Computers, and Programming

CXC CAPE Computer Science syllabus

Grades I–VII

Overall CAPE certification grading scale, with Grade I as highest

Caribbean Examinations Council

Grades I–V

Recognized passing grades across tertiary institutions in the Caribbean

Caribbean Examinations Council

BBD$69.50

Official CXC 2026 subject fee per Unit for member territories

Caribbean Examinations Council Scale of Fees

94

Free original practice questions provided in this study bank

OpenExamPrep

CAPE Computer Science Unit 1 (Fundamentals of Computer Science) is administered by the Caribbean Examinations Council (CXC) for post-16 students across the Caribbean. Paper 01 consists of 45 compulsory multiple-choice items—15 per module—administered in 1 hour 30 minutes and weighted at 30% of the final Unit grade. Results are reported on a seven-point scale (Grades I–VII). This 94-question practice bank provides independent multiple-choice preparation covering digital logic, CPU architecture, data representation, algorithms, flowcharts, and C programming with worked explanations.

Sample CAPE Computer Science Unit 1 Practice Questions

Try these sample questions to review concepts for the CAPE Computer Science Unit 1 exam. Each question includes a detailed explanation. Start the interactive quiz above for the full 94+ question experience with AI tutoring.

1What is the primary role of the Arithmetic Logic Unit (ALU) within the Central Processing Unit?
A.To execute basic mathematical calculations and logical comparisons on data
B.To direct the sequence of instruction execution and issue control signals
C.To store the memory address of the next instruction waiting to be fetched
D.To maintain permanent non-volatile system firmware across restarts
Explanation: The Arithmetic Logic Unit (ALU) is responsible for executing arithmetic computations (such as addition and subtraction) and logical evaluations (such as AND, OR, and comparison operations). Intermediate results from the ALU are typically passed into the Accumulator or status flags.
2Which dedicated processor register holds the memory address of the next machine instruction scheduled to be fetched?
A.Current Instruction Register (CIR)
B.Program Counter (PC)
C.Memory Data Register (MDR)
D.Accumulator (AC)
Explanation: The Program Counter (PC) stores the memory address of the next instruction to be fetched from primary storage. Once the instruction address is copied to the Memory Address Register (MAR), the PC is automatically incremented.
3How does the physical width of the system data bus directly influence computer performance?
A.It determines the maximum total addressable memory space in RAM
B.It sets the maximum clock frequency at which processor logic operates
C.It determines the volume of data that can be transferred in a single bus cycle
D.It controls the number of interrupt requests handled concurrently
Explanation: The data-bus width is the number of bits that can be transferred simultaneously between components in one bus transfer. A wider data bus can transfer more data at once; it does not necessarily equal the processor's word size.
4What is the hexadecimal equivalent of the 8-bit binary pattern 11010110?
A.E6
B.C6
C.D4
D.D6
Explanation: To convert binary to hexadecimal, partition the 8 bits into two 4-bit nibbles: 1101 and 0110. 1101_2 corresponds to (8 + 4 + 1) = 13_10, which is represented by hex digit D. 0110_2 corresponds to (4 + 2) = 6_10. Combining them yields D6.
5Under what exact input conditions does a two-input Exclusive-OR (XOR) logic gate produce an output of logic 1?
A.When either input line is logic 1, but not both simultaneously
B.When both input lines are set to logic 1
C.When both input lines are set to logic 0
D.When the two input signals are identical to each other
Explanation: An XOR gate behaves as an odd-parity or inequality detector, asserting a HIGH (1) output only when its inputs differ from one another (i.e. A=0, B=1 or A=1, B=0). When both inputs are equal, the XOR output evaluates to 0.
6Convert the positive denary number 147 into an 8-bit unsigned binary representation.
A.10010101
B.10010011
C.10100011
D.10001111
Explanation: Express 147 as a sum of powers of 2: 128 + 16 + 2 + 1. Placing 1s at weights 128 (2^7), 16 (2^4), 2 (2^1), and 1 (2^0), and 0s elsewhere gives the 8-bit binary byte 10010011.
7What is the 8-bit two's complement binary representation of decimal -43?
A.10101011
B.11010100
C.11010101
D.11001101
Explanation: First, represent +43 in 8-bit binary: 00101011 (32 + 8 + 2 + 1). Next, invert all bits to obtain the one's complement: 11010100. Finally, add 1 to the least significant bit: 11010100 + 1 = 11010101.
8Which pair of Boolean expressions correctly defines the Sum and Carry outputs of a digital half-adder circuit for inputs A and B?
A.Sum = A OR B; Carry = A XOR B
B.Sum = A AND B; Carry = A OR B
C.Sum = A XNOR B; Carry = A AND B
D.Sum = A XOR B; Carry = A AND B
Explanation: A half adder adds two single binary digits A and B. The Sum bit is 1 when exactly one input is 1 (A XOR B), while the Carry bit is 1 only when both inputs are 1 (A AND B).
9How can a 1-bit full-adder circuit be constructed from simpler digital logic sub-circuits?
A.Two half-adders and one OR gate
B.Two half-adders and one AND gate
C.Two half-adders with their carry outputs left unconnected
D.One half-adder and two XOR gates
Explanation: A 1-bit full adder combines three inputs (A, B, and Carry-in). The first half-adder adds A and B. The second half-adder adds the partial sum to Carry-in. The carry outputs from both half-adders are mutually exclusive and are combined through a single OR gate to produce the final Carry-out.
10What is the primary function of the Memory Address Register (MAR) during memory read and write operations?
A.It stores the binary operation code being decoded by the control unit
B.It holds the physical address of the memory location currently being accessed
C.It holds the numerical result generated by the most recent ALU operation
D.It buffers the data word received from primary memory before execution
Explanation: The Memory Address Register (MAR) connects directly to the address bus and holds the specific memory address from which data will be fetched or to which data will be written.

About the CAPE Computer Science Unit 1 Exam

CAPE Computer Science Unit 1, titled Fundamentals of Computer Science, is the first certifiable unit of the Caribbean Examinations Council's Advanced Proficiency Examination in Computer Science. It covers three modules: Module 1 (Computer Architecture), Module 2 (Problem-Solving with Computers), and Module 3 (Programming). Assessment comprises Paper 01 (45 MCQs, 15 per module, 30%), Paper 02 (six structured questions, 50%) and an SBA programming project (20%). Private candidates could take Paper 032 in 2026; from May–June 2027, all candidates complete SBA and Paper 032 is discontinued.

Exam sponsor: Caribbean Examinations Council (CXC). The requirements and fees below concern the certification or admission exam, separate from our free practice resources.

Assessment

Paper 01: 45 MCQs, 15 per module (30%); Paper 02: six structured questions, two per module (50%); SBA programming project (20%). Paper 032 was the private-candidate alternative in 2026. From May–June 2027, all candidates complete SBA; Paper 032 is discontinued.

Time Limit

Paper 01: 1 hour 30 minutes; Paper 02: 2 hours 30 minutes. The 2-hour Paper 032 applied to private candidates in 2026; it is discontinued from May–June 2027.

Passing Score

CXC does not publish numerical grade cut-scores. CAPE reports overall grades I–VII (Grade I highest) based on composite performance across Papers 01, 02, and SBA. Grades I–V are recognized as passing grades.

Exam / Certification Fees

From May–June 2026, CXC lists BBD$69.50 per CAPE Unit plus BBD$48.50 candidate entry for member territories; local fees may apply. Confirm the total with your Local Registrar.

Exam sponsor website

Fees, eligibility, and exam policies can change. Confirm them with the exam sponsor before applying or paying.

Our practice resources: topics covered

We aim to reflect publicly available exam outlines and topic information in our study resources. Coverage, format, and difficulty may differ from the actual exam, and we cannot guarantee that every detail is accurate or current. Confirm exam requirements, fees, and policies with the official exam sponsor.

33%

Module 1: Computer Architecture

Covers digital logic gates, truth tables, combinational and sequential logic circuits (flip-flops, registers, counters, adders, multiplexers, decoders), data representation (binary, octal, hexadecimal, two's complement, floating-point, character encodings), processor components (ALU, CU, registers, buses), and the instruction cycle.

33%

Module 2: Problem-Solving with Computers

Covers the stages of problem-solving, algorithm properties, pseudocode conventions, standard flowchart symbols, desk checking and trace tables, structured programming constructs (sequence, selection, iteration), and top-down stepwise refinement.

34%

Module 3: Programming

Covers programming paradigms (procedural, object-oriented, functional, declarative), language translation (compilers, interpreters, assemblers), syntax and semantic analysis, procedural programming implementation in C, variables, arrays, structures, functions and parameter passing, file input/output, and testing and debugging strategies.

Preparing for the CAPE Computer Science Unit 1 Exam

What You Need to Know

  • Passing score: CXC does not publish numerical grade cut-scores. CAPE reports overall grades I–VII (Grade I highest) based on composite performance across Papers 01, 02, and SBA. Grades I–V are recognized as passing grades.
  • Assessment: Paper 01: 45 MCQs, 15 per module (30%); Paper 02: six structured questions, two per module (50%); SBA programming project (20%). Paper 032 was the private-candidate alternative in 2026. From May–June 2027, all candidates complete SBA; Paper 032 is discontinued.
  • Time limit: Paper 01: 1 hour 30 minutes; Paper 02: 2 hours 30 minutes. The 2-hour Paper 032 applied to private candidates in 2026; it is discontinued from May–June 2027.
  • Exam / certification fees: From May–June 2026, CXC lists BBD$69.50 per CAPE Unit plus BBD$48.50 candidate entry for member territories; local fees may apply. Confirm the total with your Local Registrar. Official sources

Using Our Practice Resources

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CAPE Computer Science Unit 1: Suggested Study Strategy

1Allocate study time equally across the three modules: Paper 01 features exactly 15 questions per module, ensuring balanced coverage of architecture, problem-solving, and programming.
2Master digital logic and Boolean algebra: practice deriving truth tables, simplifying Boolean expressions using De Morgan's laws, and distinguishing between combinational circuits (adders, multiplexers) and sequential circuits (flip-flops, counters).
3Gain speed with numeric conversions: practice fast conversions between binary, hexadecimal, and denary, as well as performing two's complement arithmetic and identifying arithmetic overflow.
4Trace algorithms methodically: draw structured trace tables to track variable states, loop counter updates, and condition evaluations step-by-step to prevent off-by-one errors.
5Write and test real C programs: write code for array operations, string handling, nested control structures, structs, and file read/write operations to build intuition for syntax and runtime behavior.
6Understand translation and compilation stages: know the precise functions of lexical analysis, syntax parsing, semantic type-checking, code generation, and linkers.

Frequently Asked Questions

How many questions are on CAPE Computer Science Unit 1 Paper 01?

Paper 01 consists of 45 compulsory multiple-choice questions, with exactly 15 questions selected from each of the three Modules, completed in 1 hour 30 minutes.

What are the three modules tested in CAPE Computer Science Unit 1?

The three modules are Module 1: Computer Architecture, Module 2: Problem-Solving with Computers, and Module 3: Programming.

What programming language is assessed in CAPE Computer Science Unit 1?

The CXC CAPE Computer Science syllabus specifies procedural programming, with C being the standard reference language examined for coding questions, algorithmic implementations, and School-Based Assessment (SBA).

What is the passing standard for CAPE Computer Science Unit 1?

CXC reports overall results on a 7-point scale from Grade I (highest) to Grade VII based on composite performance across Paper 01 (30%), Paper 02 (50%), and Paper 03 (20%). Grades I to V represent recognized passing grades.

How much does it cost to register for CAPE Computer Science Unit 1 in 2026?

From May–June 2026, CXC lists the regional subject fee at BBD$69.50 per Unit plus a BBD$48.50 candidate entry fee for member territories. Local registrar administrative fees may also apply.

Are these official CXC examination questions?

These are independent English-language MCQ study questions developed by OpenExamPrep for CAPE Computer Science Unit 1. They are not official CXC examination questions or an official-format simulation, and do not replace laboratory programming practice or structured problem-solving.