4.1 Boolean Algebra & Logic Gates
Key Takeaways
- Boolean algebra uses only two values — true (1) and false (0) — and is the math behind every digital circuit and many programming conditions
- AND outputs 1 only when every input is 1; OR outputs 1 when any input is 1; NOT flips a single input
- XOR outputs 1 when inputs differ; NAND is AND followed by NOT and can build any other gate
- Compound expressions are evaluated with parentheses and standard operator precedence; De Morgan’s laws rewrite NOT(AND) and NOT(OR) into OR/AND of negated inputs
- Cyber Test items often ask you to read a truth table, evaluate a small expression, or match a gate name to its behavior — not to design VLSI chips
4.1 Boolean Algebra & Logic Gates
Quick Answer: Boolean logic uses two values — 1 (true) and 0 (false) — and combines them with gates such as AND, OR, NOT, XOR, and NAND. Know each gate’s truth table and how to evaluate short compound expressions; that skill shows up on the USAF Cyber Test (CT / ICTL heritage) under computing fundamentals.
Digital computers do not think in prose. At the lowest useful layer for this exam, they evaluate Boolean (true/false) conditions and wire those decisions through logic gates. Understanding gates is not about becoming a hardware engineer — it is about reading a truth table, predicting an output, and seeing why an if statement or a firewall rule behaves the way it does.
Why Boolean Logic Matters on the Cyber Test
Boolean algebra is the shared language of:
- Hardware — adders, ALUs, and control circuits are networks of gates
- Software — comparisons and compound conditions (
A && B,!flag) - Security policy — “allow if authenticated AND authorized,” “block if known-bad OR unsigned”
You will rarely need advanced circuit design. You will need to answer: given these inputs, what does this gate or expression output?
Boolean Values and Operators
| Symbol / Name | Meaning | Typical programming form |
|---|---|---|
| 1 / true / HIGH | The condition holds | true, non-zero |
| 0 / false / LOW | The condition does not hold | false, zero |
| AND (·, ∧, &) | True only if all inputs are true | A && B |
| OR (+, ∨, |) | True if any input is true | A || B |
| NOT (¬, ¯, !) | Flips one input | !A |
| XOR (⊕) | True if inputs differ | A ^ B (bitwise) |
| NAND | NOT of AND | !(A && B) |
Convention on this exam’s style of questions: treat 1 = true and 0 = false unless a problem states otherwise.
Core Gate Truth Tables
Memorize these five tables. They are the highest-yield facts in this section.
AND Gate
Output is 1 only when every input is 1.
| A | B | A AND B |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
Cyber framing: “User has a valid token AND is on the allowlist” — both must be true to pass.
OR Gate
Output is 1 if at least one input is 1.
| A | B | A OR B |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
Cyber framing: “Alert if IDS fires OR the SIEM correlation rule matches.”
NOT Gate (Inverter)
One input; output is the opposite.
| A | NOT A |
|---|---|
| 0 | 1 |
| 1 | 0 |
Cyber framing: “Allow if the account is NOT locked.”
XOR Gate (Exclusive OR)
Output is 1 when the inputs differ (exactly one of two inputs is 1).
| A | B | A XOR B |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
Why it matters: XOR is used in parity checks, simple toggle logic, and (at a conceptual level) one-time pad style “same bits cancel” thinking. For the Cyber Test, focus on the truth table: same inputs → 0; different → 1.
NAND Gate
NAND is AND followed by NOT. Output is 0 only when every input is 1; otherwise 1.
| A | B | A NAND B |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
Why NAND is special: In digital design, NAND is a universal gate — you can build NOT, AND, and OR from NAND alone. Exam questions usually ask for the output, not a full proof of universality, but recognizing “NAND is inverted AND” is enough to avoid mistakes.
Reading Compound Expressions
Gates combine. Evaluate inside parentheses first, then apply unary NOT, then AND-family operations, then OR-family operations — or simply follow any parentheses the question gives you.
Example 1: Evaluate (A AND B) OR (NOT C) when A=1, B=0, C=0.
A AND B→ 1 AND 0 → 0NOT C→ NOT 0 → 10 OR 1→ 1
Example 2: Evaluate A XOR B when A=1, B=1 → 0 (inputs match).
Example 3: NOT (A OR B) when A=0, B=1 → NOT(1) → 0. Compare with (NOT A) AND (NOT B) → 1 AND 0 → 0. Same result — that is De Morgan’s idea in action.
De Morgan’s Laws (Exam-Useful Form)
Two rewrite rules appear often in aptitude-style logic:
- NOT (A AND B) = (NOT A) OR (NOT B)
- NOT (A OR B) = (NOT A) AND (NOT B)
In words: when you push a NOT through an AND, it becomes OR of the negated inputs (and vice versa). If a question rewrites a firewall rule or a Boolean expression, check whether the rewrite matches De Morgan — do not assume “NOT of AND” is the same as “NOT of each AND-ed together” without flipping the operator.
| Original | Equivalent rewrite |
|---|---|
| NOT (A AND B) | (NOT A) OR (NOT B) |
| NOT (A OR B) | (NOT A) AND (NOT B) |
| A NAND B | NOT (A AND B) |
Gate Identity Quick Checks
Use these shortcuts to catch careless errors:
| Pattern | Result |
|---|---|
| A AND 1 | A |
| A AND 0 | 0 |
| A OR 0 | A |
| A OR 1 | 1 |
| A XOR 0 | A |
| A XOR 1 | NOT A |
| A XOR A | 0 |
| A AND A | A |
| A OR A | A |
From Gates to “Why Computers Work”
A half adder (conceptual only) uses XOR for the sum bit and AND for the carry bit. You do not need the schematic on the Cyber Test, but it explains a deeper truth: arithmetic and logic share the same binary foundation. When earlier chapters covered binary and bitwise operations, those bit patterns were being decided by the same Boolean rules you are studying here.
In software, a condition such as if (authenticated && !banned) is literally an AND of one variable with the NOT of another. When debugging access control mentally, translate English policy into gates, then walk the truth table with the given inputs.
Common Exam Traps
- Confusing OR with XOR — OR is true when both inputs are 1; XOR is false when both are 1.
- Forgetting NOT binds tightly —
NOT A AND Bis usually(NOT A) AND B, notNOT (A AND B), unless parentheses say otherwise. - Misreading NAND — people remember “inverted AND” but then invert the wrong row; only the 1,1 input of AND becomes 0 under NAND.
- Assuming three-input gates change the rules — for AND/OR, every input must be 1 / any input may be 1; extend the two-input table accordingly.
Study Drill
Before the next section, cover each truth table and recreate it from memory. Then evaluate:
(1 AND 0) OR 11 XOR 0NOT (0 OR 0)1 NAND 1
Answers: 1, 1, 1, 0.
Master these tables and short evaluations, and Boolean items on the Cyber Test become pattern recognition rather than guesswork.
For a two-input AND gate, when is the output 1?
What is the output of a two-input XOR gate when both inputs are 1?
Which statement correctly describes a NAND gate?
According to De Morgan’s laws, NOT (A OR B) is equivalent to which expression?