1.14 Transistor and FET Symbols, Configurations and External Behaviour

1.14 Transistor and FET Symbols, Configurations and External Behaviour

ACMA Exam Focus: Syllabus items 4.30 and 4.31. You must identify the symbols for NPN and PNP bipolar transistors and the field effect transistor, recall their basic external operating characteristics, and identify a device in a common-emitter or common-source configuration. The syllabus is explicit about the depth required: "Candidates are not required to have knowledge of the internal workings of a transistor. Questions about transistor circuits will be simple and limited to common emitter or common source configurations." Learn the symbols, terminal names and external behaviour — not doping and depletion regions.

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1. The Bipolar Transistor: Three Terminals

A bipolar junction transistor (BJT) has three terminals:

• Emitter — the lead carrying the arrow on the symbol.
• Base — the control terminal, drawn as the vertical bar the other leads meet.
• Collector — the remaining angled lead, with no arrow.

NPN and PNP symbols are identical apart from that one arrow's direction, so reading the arrow is the whole exercise. The syllabus defines "identify" as picking the right item from a supplied set of diagrams, so these are recognition marks.

The memory hook is NPN = Not Pointing iN. The arrow is always on the emitter, never the collector, and shows the direction of conventional current.

2. External Behaviour: A Current-Controlled Device

One sentence captures it: a small base current controls a much larger collector current. The ratio is the DC current gain:

$h_{FE} = \frac{I_C}{I_B}$

and $I_E = I_C + I_B$, so the emitter carries the most current.

Nothing happens until the base-emitter junction is forward biased past its turn-on voltage: about 0.6 to 0.7 V for silicon, 0.2 to 0.3 V for germanium (syllabus 4.27). Below that the transistor is an open switch; above it, collector current follows base current.

Worked example. A silicon NPN transistor with $h_{FE} = 150$ has a base current of 40 uA. Find the collector and emitter currents.

$I_C = h_{FE} \times I_B = 150 \times 40\ \mu\text{A} = 6000\ \mu\text{A} = 6\ \text{mA}$

$I_E = I_C + I_B = 6 + 0.04 = 6.04\ \text{mA}$

Note that $h_{FE}$ varies enormously between samples of the same type — about 20 to 800 — and shifts with temperature and current, so practical circuits set the operating point with a bias network and emitter resistor rather than trusting the figure.

3. The Field Effect Transistor

A FET also has three terminals: the source (carriers enter, compare the emitter), the gate (the control terminal, compare the base) and the drain (carriers leave, compare the collector). FETs come in N-channel and P-channel versions and two symbol families:

• JFET (junction FET). A continuous channel line with source and drain at either end and the gate entering side-on through an arrowhead. On an N-channel JFET the gate arrow points in towards the channel; on a P-channel JFET it points out.
• MOSFET. The channel is drawn as three short broken segments with the gate as a separate bar that does not touch them — a reminder that the gate is insulated from the channel by a thin oxide layer. A substrate arrow alongside points inwards for an N-channel device.

External behaviour to remember:

• A FET is voltage controlled: the gate-to-source voltage sets the drain current.
• The gate draws essentially no current, so the input impedance is very high — megohms for a JFET, far higher for a MOSFET.
• The gain figure is transconductance, $g_m = \Delta I_D / \Delta V_{GS}$, in siemens (usually millisiemens).
• JFETs conduct at zero gate voltage and turn off with reverse gate bias, while enhancement MOSFETs are off until gate voltage is applied.
• High input impedance and good strong-signal handling make FETs popular in receiver front ends.

Static precautions for MOSFETs. The gate insulating layer is extraordinarily thin, and static from your body or clothing — at voltages too low to feel — can punch straight through it. The damage is often latent, so the device works then fails days later. Leave it in conductive foam until fitting, wear an earthed anti-static wrist strap, handle it by the body rather than the gate lead, use an earthed-tip soldering iron with the equipment switched off, and never rely on the internal gate-protection diodes.

4. Bipolar versus FET Compared

5. Identifying a Common-Emitter Stage

A stage is named after the terminal common to both input and output circuits — not the terminal the signal is fed into. Find where the input is injected, find where the output is taken, and the remaining terminal names the stage. For a common emitter, look for three features together:

• The input is applied to the base, usually through a coupling capacitor.
• The output is taken from the collector, where a load resistor runs up to the supply rail.
• The emitter is earthed directly, or through a small resistor with a bypass capacitor, so it is common to input and output at signal frequencies.

Its external behaviour: about 180 degrees of phase inversion (drive the base more positive, more collector current flows, more voltage drops across the load resistor, so collector voltage falls), high voltage gain, and a moderate input impedance of a few hundred ohms to a few kilohms. It is the standard general purpose amplifier — audio, IF and driver stages.

6. Identifying a Common-Source Stage

The same drill with FET names: input at the gate, output at the drain across a load resistor or tuned circuit, source earthed or bypassed to earth for signals. Behaviour mirrors the common emitter — about 180 degrees of phase inversion and high voltage gain — but with a very high input impedance that barely loads the preceding stage.

Worked example. A common-source stage runs from a 15 V supply with a drain load resistor $R_D = 1.2$ kilohms and drain current $I_D = 8$ mA. Find the voltage across the load and the drain voltage.

$V_{R_D} = I_D \times R_D = 0.008 \times 1200 = 9.6\ \text{V}$

$V_D = 15 - 9.6 = 5.4\ \text{V}$

The drain idles at about 5.4 V, leaving headroom for the output to swing both ways without hitting the supply rail or cut-off.

7. Other Configurations, for Contrast

The paper limits transistor questions to common-emitter and common-source stages, but recognising the alternatives helps eliminate wrong answers.

Elimination rule: if the output is taken from the emitter, it is not a common-emitter stage, however the transistor is drawn.

8. Quick Recap

• The arrow sits on the emitter: out for NPN, in for PNP.
• NPN runs with the collector positive with respect to the emitter; PNP negative.
• Silicon needs roughly 0.6-0.7 V base-emitter to conduct, and $h_{FE} = I_C / I_B$.
• A FET is voltage controlled, draws no significant gate current and has a very high input impedance.
• Common emitter: base in, collector out, emitter common, inverted. Common source: gate in, drain out, source common, inverted.